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M29F010B90N1 Datasheet(PDF) 4 Page - STMicroelectronics |
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M29F010B90N1 Datasheet(HTML) 4 Page - STMicroelectronics |
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4 / 20 page  M29F010B 4/20 VLKO. This prevents Bus Write operations from ac- cidentally damaging the data during power up, power down and power surges. If the Program/ Erase Controller is programming or erasing during this time then the operation aborts and the memo- ry contents being altered will be invalid. A 0.1µF capacitor should be connected between the VCC Supply Voltage pin and the VSS Ground pin to decouple the current surges from the power supply. The PCB track widths must be sufficient to carry the currents required during program and erase operations, ICC4. Vss Ground. The VSS Ground is the reference for all voltage measurements. BUS OPERATIONS There are five standard bus operations that control the device. These are Bus Read, Bus Write, Out- put Disable, Standby and Automatic Standby. See Table 4, Bus Operations, for a summary. Typically glitches of less than 5ns on Chip Enable or Write Enable are ignored by the memory and do not af- fect bus operations. Bus Read. Bus Read operations read from the memory cells, or specific registers in the Com- mand Interface. A valid Bus Read operation in- volves setting the desired address on the Address Inputs, applying a Low signal, VIL, to Chip Enable and Output Enable and keeping Write Enable High, VIH. The Data Inputs/Outputs will output the value, see Figure 8, Read Mode AC Waveforms, and Table 11, Read AC Characteristics, for details of when the output becomes valid. Bus Write. Bus Write operations write to the Command Interface. A valid Bus Write operation begins by setting the desired address on the Ad- dress Inputs. The Address Inputs are latched by the Command Interface on the falling edge of Chip Enable or Write Enable, whichever occurs last. The Data Inputs/Outputs are latched by the Com- mand Interface on the rising edge of Chip Enable or Write Enable, whichever occurs first. Output En- able must remain High, VIH, during the whole Bus Write operation. See Figures 9 and 10, Write AC Waveforms, and Tables 12 and 13, Write AC Characteristics, for details of the timing require- ments. Output Disable. The Data Inputs/Outputs are in the high impedance state when Output Enable is High, VIH. Standby. When Chip Enable is High, VIH, the Data Inputs/Outputs pins are placed in the high- impedance state and the Supply Current is re- duced to the Standby level. When Chip Enable is at VIH the Supply Current is reduced to the TTL Standby Supply Current ICC2. To further reduce the Supply Current to the CMOS Standby Supply Current, ICC3, Chip Enable should be held within VCC ± 0.2V. For Standby current levels see Table 10, DC Characteristics. During program or erase operations the memory will continue to use the Program/Erase Supply Current, ICC4, for Program or Erase operations un- til the operation completes. Automatic Standby. If CMOS levels (VCC ± 0.2V) are used to drive the bus and the bus is inactive for 150ns or more the memory enters Automatic Standby where the internal Supply Current is re- duced to the CMOS Standby Supply Current, ICC3. The Data Inputs/Outputs will still output data if a Bus Read operation is in progress. Special Bus Operations Additional bus operations can be performed to read the Electronic Signature and also to apply and remove Block Protection. These bus opera- tions are intended for use by programming equip- ment and are not usually used in applications. They require VID to be applied to some pins. Electronic Signature. The memory has two codes, the manufacturer code and the device code, that can be read to identify the memory. These codes can be read by applying the signals listed in Table 4, Bus Operations. Block Protection and Blocks Unprotection. Each block can be separately protected against acci- dental Program or Erase. Protected blocks can be unprotected to allow data to be changed. Block Protection and Blocks Unprotection operations must only be performed on programming equip- ment. For further information refer to Application Note AN1122, Applying Protection and Unprotec- tion to M29 Series Flash. |
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