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M48T512V Datasheet(PDF) 6 Page - STMicroelectronics |
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M48T512V Datasheet(HTML) 6 Page - STMicroelectronics |
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6 / 21 page  M48T512Y, M48T512V* 6/21 OPERATING MODES The 32-pin, 600mil DIP Hybrid houses a controller chip, SRAM, quartz crystal, and a long life lithium button cell in a single package. Figure 11., page 15 illustrates the static memory array and the quartz controlled clock oscillator. The clock locations contain the year, month, date, day, hour, minute, and second in 24 hour BCD format. Corrections for 28, 29 (leap year - compliant until the year 2100), 30, and 31 day months are made automatically. Byte 7FFF8h is the clock control register (see Table 5., page 11). This byte controls user access to the clock information and also stores the clock calibration setting. The seven clock bytes (7FFFFh-7FFF9h) are not the actual clock counters, they are memory locations consist- ing of BiPORT™ READ/WRITE memory cells within the static RAM array. The M48T512Y/V in- cludes a clock control circuit which updates the clock bytes with current information once per sec- ond. The information can be accessed by the user in the same manner as any other location in the static memory array. The M48T512Y/V also has its own Power-Fail Detect circuit. This control circuitry constantly monitors the supply voltage for an out of tolerance condition. When VCC is out of toler- ance, the circuit write protects the TIMEKEEPER register data and SRAM, providing data security in the midst of unpredictable system operation. As VCC falls, the control circuitry automatically switch- es to the battery, maintaining data and clock oper- ation until valid power is restored. Table 2. Operating Modes Note: X = VIH or VIL; VSO = Battery Back-up Switchover Voltage. 1. See Table 10., page 17 for details. Mode VCC E G W DQ0-DQ7 Power Deselect 4.5 to 5.5V or 3.0 to 3.6V VIH X X High Z Standby WRITE VIL X VIL DIN Active READ VIL VIL VIH DOUT Active READ VIL VIH VIH High Z Active Deselect VSO to VPFD (min) (1) X X X High Z CMOS Standby Deselect ≤ VSO(1) X X X High Z Battery Back-up Mode |
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