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M48T35YPC Datasheet(PDF) 3 Page - STMicroelectronics |
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M48T35YPC Datasheet(HTML) 3 Page - STMicroelectronics |
3 / 18 page 3/18 M48T35, M48T35Y nection to a separate SNAPHAT housing contain- ing the battery and crystal. The unique design allows the SNAPHAT battery package to be mounted on top of the SOIC package after the completion of the surface mount process. Inser- tion of the SNAPHAT housing after reflow pre- vents potential battery and crystal damage due to the high temperatures required for device surface- mounting. The SNAPHAT housing is keyed to pre- vent reverse insertion. The SOIC and battery/crys- tal packages are shipped separately in plastic anti- static tubes or in Tape & Reel form. For the 28 lead SOIC, the battery/crystal package (i.e. SNAPHAT) part number is "M4T28- BR12SH1". As Figure 3 shows, the static memory array and the quartz controlled clock oscillator of the M48T35/35Y are integrated on one silicon chip. The two circuits are interconnected at the upper eight memory locations to provide user accessible BYTEWIDE clock information in the bytes with ad- dresses 7FF8h-7FFFh. Table 3. Operating Modes (1) Note: 1. X = VIH or VIL; VSO = Battery Back-up Switchover Voltage. 2. See Table 7 for details. Mode VCC E G W DQ0-DQ7 Power Deselect 4.75V to 5.5V or 4.5V to 5.5V VIH X X High Z Standby Write VIL X VIL DIN Active Read VIL VIL VIH DOUT Active Read VIL VIH VIH High Z Active Deselect VSO to VPFD (min) (2) X X X High Z CMOS Standby Deselect ≤ VSO X X X High Z Battery Back-up Mode Figure 3. Block Diagram AI01623 LITHIUM CELL OSCILLATOR AND CLOCK CHAIN VPFD VCC VSS 32,768 Hz CRYSTAL VOLTAGE SENSE AND SWITCHING CIRCUITRY 8 x 8 BiPORT SRAM ARRAY 32,760 x 8 SRAM ARRAY A0-A14 DQ0-DQ7 E W G POWER |
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