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M48Z128YCS Datasheet(PDF) 2 Page - STMicroelectronics

Part # M48Z128YCS
Description  1 Mbit 128Kb x8 ZEROPOWER SRAM
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

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M48Z128, M48Z128Y
2/17
Figure 2. DIP Connections
A1
A0
DQ0
A7
A4
A3
A2
A6
A5
A13
A10
A8
A9
DQ7
A15
A11
G
E
DQ5
DQ1
DQ2
DQ3
VSS
DQ4
DQ6
A16
NC
VCC
AI01195
M48Z128
M48Z128Y
10
1
2
5
6
7
8
9
11
12
13
14
15
16
30
29
26
25
24
23
22
21
20
19
18
17
A12
A14
W
NC
3
4
28
27
32
31
Table 2. Absolute Maximum Ratings (1)
Note: 1. Stresses greater than those listed under ”Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or any other conditions above those indicated in the operational section
of this specification is not implied. Exposure to the absolute maximum rating conditions for extended periods of time may affect
reliability.
2. Soldering temperature not to exceed 260
°C for 10 seconds (total thermal budget not to exceed 150°C for longer than 30 seconds).
CAUTION: Negative undershoots below –0.3V are not allowed on any pin while in the Battery Back-up mode.
Table 3. Operating Modes
Note: 1. X = VIH or VIL;VSO = Battery Back-up Switchover Voltage.
Symbol
Parameter
Value
Unit
TA
Ambient Operating Temperature
0 to 70
°C
TSTG
Storage Temperature (VCC Off)
–40 to 70
°C
TBIAS
Temperature Under Bias
–10 to 70
°C
TSLD
(2)
Lead Solder Temperature for 10 seconds
260
°C
VIO
Input or Output Voltages
–0.3 to 7
V
VCC
Supply Voltage
–0.3 to 7
V
Mode
VCC
E
G
W
DQ0-DQ7
Power
Deselect
4.75V to 5.5V
or
4.5V to 5.5V
VIH
X
X
High Z
Standby
Write
VIL
X
VIL
DIN
Active
Read
VIL
VIL
VIH
DOUT
Active
Read
VIL
VIH
VIH
High Z
Active
Deselect
VSO to VPFD (min)
X
X
X
High Z
CMOS Standby
Deselect
≤ VSO
X
X
X
High Z
Battery Back-up Mode
DESCRIPTION
The M48Z128/128Y ZEROPOWER® RAM is a
128 Kbit x8 non-volatile static RAM that integrates
power-fail deselect circuitry and battery control
logic on a single die. The monolithic chip is avail-
able in two special packages to provide a highly in-
tegrated battery backed-up memory solution.
The M48Z128/128Y is a non-volatile pin and func-
tion equivalent to any JEDEC standard 128K x8
SRAM. It also easily fits into many ROM, EPROM,
and EEPROM sockets, providing the non-volatility
of PROMs without any requirement for special
write timing or limitations on the number of writes
that can be performed. The 32 pin 600mil DIP
Module houses the M48Z128/128Y silicon with a
long life lithium button cell in a single package.
For surface mount environments ST provides a Chip
Set solution consisting of a 28 pin 330mil SOIC
NVRAM Supervisor (M40Z300) and a 32 pin TSOP
(8 x 20mm) LPSRAM (M68Z128) packages.
The 28 pin 330mil SOIC provides sockets with
gold plated contacts at both ends for direct con-
nection to a separate SNAPHAT housing contain-
ing the battery.


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