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M48T35AY-70PC1TR Datasheet(PDF) 3 Page - STMicroelectronics |
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M48T35AY-70PC1TR Datasheet(HTML) 3 Page - STMicroelectronics |
3 / 19 page 3/19 M48T35AY, M48T35AV Table 2. Absolute Maximum Ratings (1) Note: 1. Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to the absolute maximum rating conditions for extended periods of time may affect reliability. 2. Soldering temperature not to exceed 260°C for 10 seconds (total thermal budget not to exceed 150°C for longer than 30 seconds). CAUTION: Negative undershoots below –0.3V are not allowed on any pin while in the Battery Back-up mode. Symbol Parameter Value Unit TA Ambient Operating Temperature Grade 1 0 to 70 °C Grade 6 –40 to 85 °C TSTG Storage Temperature (VCC Off, Oscillator Off) –40 to 85 °C TSLD (2) Lead Solder Temperature for 10 seconds 260 °C VIO Input or Output Voltages M48T35AY –0.3 to 7 V M48T35AV –0.3 to 4.6 V VCC Supply Voltage M48T35AY –0.3 to 7 V M48T35AV –0.3 to 4.6 V IO Output Current 20 mA PD Power Dissipation 1 W Table 3. Operating Modes (1) Note: 1. X = VIH or VIL; VSO = Battery Back-up Switchover Voltage. 2. See Table 7 for details. Mode VCC E G W DQ0-DQ7 Power Deselect 4.5V to 5.5V or 3.0V to 3.6V VIH X X High Z Standby Write VIL X VIL DIN Active Read VIL VIL VIH DOUT Active Read VIL VIH VIH High Z Active Deselect VSO to VPFD (min) (2) X X X High Z CMOS Standby Deselect ≤ VSO X X X High Z Battery Back-up Mode The eight clock bytes are not the actual clock counters themselves; they are memory locations consisting of BiPORT™ read/write memory cells. The M48T35AY/35AV includes a clock control cir- cuit which updates the clock bytes with current in- formation once per second. The information can be accessed by the user in the same manner as any other location in the static memory array. The M48T35AY/35AV also has its own Power-fail Detect circuit. The control circuitry constantly mon- itors the single 5V supply for an out of tolerance condition. When VCC is out of tolerance, the circuit write protects the SRAM, providing a high degree of data security in the midst of unpredictable sys- tem operation brought on by low VCC. As VCC falls below approximately 3V, the control circuitry con- nects the battery which maintains data and clock operation until valid power returns. |
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