List of Tables
Table 1.
Documentation Conventions ............................................................................................ 21
Table 3-1.
Memory Map ................................................................................................................... 43
Table 4-1.
Exception Types .............................................................................................................. 46
Table 4-2.
Interrupts ........................................................................................................................ 47
Table 5-1.
JTAG Port Pins Reset State ............................................................................................. 51
Table 5-2.
JTAG Instruction Register Commands ............................................................................... 56
Table 6-1.
System Control Register Map ........................................................................................... 66
Table 6-2.
VADJ to VOUT ................................................................................................................ 71
Table 6-3.
Default Crystal Field Values and PLL Programming ........................................................... 79
Table 7-1.
Hibernation Module Register Map ................................................................................... 124
Table 8-1.
Flash Protection Policy Combinations ............................................................................. 139
Table 8-2.
Flash Resident Registers ............................................................................................... 140
Table 8-3.
Internal Memory Register Map ........................................................................................ 140
Table 9-1.
GPIO Pad Configuration Examples ................................................................................. 164
Table 9-2.
GPIO Interrupt Configuration Example ............................................................................ 165
Table 9-3.
GPIO Register Map ....................................................................................................... 166
Table 10-1.
16-Bit Timer With Prescaler Configurations ..................................................................... 206
Table 10-2.
Timers Register Map ...................................................................................................... 212
Table 11-1.
Watchdog Timer Register Map ........................................................................................ 236
Table 12-1.
Samples and FIFO Depth of Sequencers ........................................................................ 259
Table 12-2.
ADC Register Map ......................................................................................................... 263
Table 13-1.
UART Register Map ....................................................................................................... 297
Table 14-1.
SSI Register Map .......................................................................................................... 341
Table 15-1.
Examples of I
2C Master Timer Period versus Speed Mode ............................................... 369
Table 15-2.
Inter-Integrated Circuit (I
2C) Interface Register Map ......................................................... 378
Table 15-3.
Write Field Decoding for I2CMCS[3:0] Field (Sheet 1 of 3) ................................................ 383
Table 16-1.
Transmit Message Object Bit Settings ............................................................................. 405
Table 16-2.
Receive Message Object Bit Settings .............................................................................. 407
Table 16-3.
CAN Protocol Ranges .................................................................................................... 409
Table 16-4.
CAN Register Map ......................................................................................................... 412
Table 17-1.
Comparator 0 Operating Modes ...................................................................................... 447
Table 17-2.
Comparator 1 Operating Modes ..................................................................................... 447
Table 17-3.
Comparator 2 Operating Modes ...................................................................................... 448
Table 17-4.
Internal Reference Voltage and ACREFCTL Field Values ................................................. 448
Table 17-5.
Analog Comparators Register Map ................................................................................. 450
Table 18-1.
PWM Register Map ........................................................................................................ 463
Table 18-2.
PWM Generator Action Encodings .................................................................................. 484
Table 19-1.
QEI Register Map .......................................................................................................... 493
Table 21-1.
Signals by Pin Number ................................................................................................... 507
Table 21-2.
Signals by Signal Name ................................................................................................. 511
Table 21-3.
Signals by Function, Except for GPIO ............................................................................. 516
Table 21-4.
GPIO Pins and Alternate Functions ................................................................................. 520
Table 22-1.
Temperature Characteristics ........................................................................................... 522
Table 22-2.
Thermal Characteristics ................................................................................................. 522
Table 23-1.
Maximum Ratings .......................................................................................................... 523
Table 23-2.
Recommended DC Operating Conditions ........................................................................ 523
11
June 04, 2007
Preliminary
LM3S2965 Microcontroller