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M95M01-RMW6TG Datasheet(PDF) 6 Page - STMicroelectronics |
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M95M01-RMW6TG Datasheet(HTML) 6 Page - STMicroelectronics |
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6 / 40 page  Description M95M01-R 6/40 1 Description The M95M01-R is an electrically erasable programmable memory (EEPROM) device. It is accessed by a high speed SPI-compatible bus. The memory array is organized as 131 072 × 8 bit. It can also be seen as 512 pages of 256 bytes each. The device is accessed by a simple serial interface that is SPI-compatible. The bus signals are C, D and Q, as shown in Table 1 and Figure 1. The device is selected when Chip Select (S) is taken Low. Communications with the device can be interrupted using Hold (HOLD). In order to meet environmental requirements, ST offers the M95M01-R in ECOPACK® packages. ECOPACK® packages are Lead-free and RoHS compliant. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. Figure 1. Logic diagram Table 1. Signal names Signal name Function Direction C Serial Clock Input D Serial Data Input Input Q Serial Data Output Output S Chip Select Input W Write Protect Input HOLD Hold Input VCC Supply voltage VSS Ground AI01789C S VCC M95xxx HOLD VSS W Q C D |
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