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FV100D-103 Datasheet(PDF) 2 Page - Fujitsu Component Limited. |
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FV100D-103 Datasheet(HTML) 2 Page - Fujitsu Component Limited. |
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2 / 80 page  MB95120MB Series 2 (Continued) • Timebase timer × 1 channel • Watch prescaler × 1 channel • LIN-UART × 1 channel • LIN function, clock asynchronous (UART) or clock synchronous (SIO) serial data transfer capable • Full duplex double buffer • UART/SIO × 1 channel • Clock asynchronous (UART) or clock synchronous (SIO) serial data transfer capable • Full duplex double buffer • I2C* × 1 channel • Built-in wake-up function • External interrupt × 12 channels • Interrupt by edge detection (rising, falling, or both edges can be selected) • Can be used to recover from low-power consumption (standby) modes. • 8/10-bit A/D converter × 12 channels • 8-bit or 10-bit resolution can be selected • LCD controller (LCDC) • 40 SEG × 4 COM (Max 160 pixels) • With blinking function • Low-power consumption (standby) mode • Stop mode • Sleep mode • Watch mode • Timebase timer mode • I/O port • The number of maximum ports : Max 87 • Port configuration • General-purpose I/O ports (N-ch open drain) : 2 ports • General-purpose I/O ports (CMOS) : 85 ports • Programmable input voltage levels of port Automotive input level / CMOS input level / hysteresis input level • Dual operation Flash memory • Erase/write and read can be executed in the different bank (Upper Bank/Lower Bank) at the same time. • Flash memory security function Protects the content of Flash memory (Flash memory device only) * : Purchase of Fujitsu I2C components conveys a license under the Philips I2C Patent Rights to use, these components in an I2C system provided that the system conforms to the I2C Standard Specification as defined by Philips. |
Similar Part No. - FV100D-103 |
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Similar Description - FV100D-103 |
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