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ADSP-21266SKSTZ-1C Datasheet(PDF) 3 Page - Analog Devices |
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ADSP-21266SKSTZ-1C Datasheet(HTML) 3 Page - Analog Devices |
3 / 44 page ADSP-21266 Rev. C | Page 3 of 44 | October 2007 TABLE OF CONTENTS Summary ............................................................... 1 Key Features ........................................................... 2 Table of Contents .................................................... 3 Revision History ...................................................... 3 General Description ................................................. 4 ADSP-21266 Family Core Architecture ...................... 4 ADSP-21266 Memory and I/O Interface Features ......... 6 Target Board JTAG Emulator Connector .................... 9 Development Tools ............................................... 9 Evaluation Kit ..................................................... 10 Designing an Emulator-Compatible DSP Board (Target) 10 Additional Information ......................................... 10 Pin Function Descriptions ........................................ 11 Address Data Pins as Flags ..................................... 14 Core Instruction Rate to CLKIN Ratio Modes ............. 14 Address Data Modes ............................................. 14 ADSP-21266 Specifications ....................................... 15 Operating Conditions ........................................... 15 Electrical Characteristics ........................................ 15 Package Information ............................................ 16 ESD Caution ...................................................... 16 Absolute Maximum Ratings ................................... 16 Timing Specifications ........................................... 16 Output Drive Currents .......................................... 37 Test Conditions ................................................... 37 Capacitive Loading ............................................... 37 Environmental Conditions ..................................... 38 Thermal Characteristics ........................................ 38 136-Ball BGA Pin Configurations ............................... 39 144-Lead LQFP Pin Configurations ............................. 42 Package Dimensions ................................................ 43 Surface-Mount Design .......................................... 44 Ordering Guide ...................................................... 44 REVISION HISTORY 9/07—Rev. B to Rev. C Corrected all outstanding document errata. Added new section Package Information .................. 16 Revised Timing Specifications ................................ 16 Ordering Guide .................................................. 44 |
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