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M74HC74B1R Datasheet(PDF) 1 Page - STMicroelectronics |
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M74HC74B1R Datasheet(HTML) 1 Page - STMicroelectronics |
1 / 11 page M54HC74 M74HC74 October 1992 DUAL D TYPE FLIP FLOP WITH PRESET AND CLEAR B1R (Plastic Package) ORDER CODES : M54HC74F1R M74HC74M1R M74HC74B1R M74HC74C1R F1R (Ceramic Package) M1R (Micro Package) C1R (Chip Carrier) PIN CONNECTIONS (top view) NC = No Internal Connection INPUT AND OUTPUT EQUIVALENT CIRCUIT . HIGH SPEED fMAX = 71 MHz (TYP.) AT VCC =5 V . LOW POWER DISSIPATION ICC =2 µA (MAX.) AT TA =25 °C . HIGH NOISE IMMUNITY VNIH =VNIL =28 % VCC (MIN.) . OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS . SYMMETRICAL OUTPUT IMPEDANCE IOH =IOL = 4 mA (MIN.) . BALANCED PROPAGATION DELAYS tPLH =tPHL . WIDE OPERATING VOLTAGE RANGE VCC (OPR) = 2 V TO 6 V . PIN AND FUNCTION COMPATIBLE WITH 54/74LS74 The M54/74HC74 is a high speed CMOS DUAL D TYPE FLOP WITH PRESET AND CLEAR fabri- cated in silicon gate C 2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. A signal on the D INPUT is transferred to the Q OUTPUT during the positive going transition of the clock pulse. CLEAR and PRESET are independent of the clock and accomplished by a low on the appropriate input. All inputs are equipped with protection circuits against static discharge and transient excess volt- age. DESCRIPTION 1/11 |
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