10-Bit, Multichannel ADCs/DACs with FIFO,

Temperature Sensing, and GPIO Ports

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7

ELECTRICAL CHARACTERISTICS (continued)

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

CKSEL = 01 (temp sense) or CKSEL =

10 (temp sense), internal reference on

65

CKSEL = 01 (temp sense) or CKSEL =

10 (temp sense), internal reference

initially off

140

CKSEL = 01 (voltage conversion)

9

CKSEL = 10 (voltage conversion),

internal reference on

9

CS or CNVST Rise to EOC

Fall—Internally Clocked

Conversion Time

CKSEL = 10 (voltage conversion),

internal reference initially off

80

µs

CKSEL = 00, CKSEL = 01 (temp sense)

40

ns

CNVST Pulse Width

CKSEL = 01 (voltage conversion)

1.4

µs

Note 2: Offset nulled.

Note 3: No bus activity during conversion. Conversion time is defined as the number of conversion clock cycles multiplied by the

clock period.

Note 4: See Table 5 for reference-mode details.

Note 5: Not production tested. Guaranteed by design.

Note 6: See the

ADC/DAC References section.

Note 7: Fast automated test, excludes self-heating effects.

Note 8: Specified over the -40°C to +85°C temperature range.

Note 9: REFSEL[1:0] = 00 or when DACs are not powered up.

Note 10: DAC linearity, gain, and offset measurements are made between codes 115 and 3981.

Note 11: The DAC buffers are guaranteed by design to be stable with a 1nF load.

Note 12: Time required by the DAC output to power up and settle within 1 LSB in the external reference mode.

Note 13: All DAC dynamic specifications are valid for a load of 100pF and 10kΩ.

Note 14: Only one digital output (either DOUT,

EOC, or the GPIOs) can be indefinitely shorted to either supply at one time.

Note 16: See the

Reset Register section and Table 9 for details on programming the SLOW bit.

Note 17: Clock mode 11 only.