Electronic Components Datasheet Search |
|
CD74HCT670MTG4 Datasheet(PDF) 1 Page - TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS |
|
CD74HCT670MTG4 Datasheet(HTML) 1 Page - TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS |
1 / 17 page 1 Data sheet acquired from Harris Semiconductor SCHS195C Features • Simultaneous and Independent Read and Write Operations • Expandable to 512 Words of n-Bits • Three-State Outputs • Organized as 4 Words x 4 Bits Wide • Buffered Inputs • Typical Read Time = 16ns for ’HC670 VCC = 5V, CL = 15pF, TA = 25 oC • Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads • Wide Operating Temperature Range . . . -55oC to 125oC • Balanced Propagation Delay and Transition Times • Significant Power Reduction Compared to LSTTL Logic ICs • HC Types - 2V to 6V Operation - High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V • HCT Types - 4.5V to 5.5V Operation - Direct LSTTL Input Logic Compatibility, VIL= 0.8V (Max), VIH = 2V (Min) - CMOS Input Compatibility, Il ≤ 1µA at VOL, VOH Description The ’HC670 and CD74HCT670 are 16-bit register files organized as 4 words x 4 bits each. Read and write address and enable inputs allow simultaneous writing into one location while reading another. Four data inputs are provided to store the 4-bit word. The write address inputs (WA0 and WA1) determine the location of the stored word in the register. When write enable (WE) is low the word is entered into the address location and it remains transparent to the data. The outputs will reflect the true form of the input data. When (WE) is high data and address inputs are inhibited. Data acquisition from the four registers is made possible by the read address inputs (RA1 and RA0). The addressed word appears at the output when the read enable (RE) is low. The output is in the high impedance state when the (RE) is high. Outputs can be tied together to increase the word capacity to 512 x 4 bits. Pinout CD54HC670 (CERDIP) CD74HC670, CD74HCT670 (PDIP, SOIC) TOP VIEW Ordering Information PART NUMBER TEMP. RANGE (oC) PACKAGE CD54HC670F3A -55 to 125 16 Ld CERDIP CD74HC670E -55 to 125 16 Ld PDIP CD74HC670M -55 to 125 16 Ld SOIC CD74HC670MT -55 to 125 16 Ld SOIC CD74HC670M96 -55 to 125 16 Ld SOIC CD74HCT670E -55 to 125 16 Ld PDIP CD74HCT670M -55 to 125 16 Ld SOIC CD74HCT670MT -55 to 125 16 Ld SOIC CD74HCT670M96 -55 to 125 16 Ld SOIC NOTE: When ordering, use the entire part number. The suffix 96 denotes tape and reel. The suffix T denotes a small-quantity reel of 250. 14 15 16 9 13 12 11 10 1 2 3 4 5 7 6 8 D1 D2 D3 RA1 RA0 Q3 GND Q2 VCC WA0 WA1 WE RE Q0 Q1 D0 January 1998 - Revised October 2003 CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. Copyright © 2003, Texas Instruments Incorporated CD54HC670, CD74HC670, CD74HCT670 High-Speed CMOS Logic 4x4 Register File [ /Title (CD74H C670, CD74H CT670) /Subject (High- Speed CMOS Logic 4x4 Reg- ister |
Similar Part No. - CD74HCT670MTG4 |
|
Similar Description - CD74HCT670MTG4 |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.NET |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |