Part Name
         Description
EPA563-1

 16 Pin DIP 3 Bit Programmable TTL Delay Lines With I/O Completely Buffered ( 1 Page)


PCA
100% 
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Package
Schematic
16 Pin DIP 3 Bit Programmable TTL Delay Lines
With I/O Completely Buffered
VOH High-Level Output Voltage
VCC= min. VIL= max. IOH = max 2.7
V
VOL
Low-Level Output Voltage
VCC= min. VIH = min. IOL= max
0.5
V
VIK
Input Clamp Voltage
VCC= min. II = IIK
-1.2
V
IIH
High-Level Input Current
VCC= max. VIN = 2.7V
50
µA
VCC= max. VIN = 5.25V
1.0
mA
IIL
Low-Level Input Current
VCC= max. VIN = 0.5V
-2
mA
IOS
Short Circuit Output Current
VCC= max. VOUT = 0.
-40
-100
mA
(One output at a time)
ICCH High-Level Supply Current
VCC= max. VIN = OPEN
130
mA
ICCL Low-Level Supply Current
VCC= max. VIN = 0
150
mA
TRO
Output Rise Time
Td
≤ 500 nS (0.75 to 2.4 Volts)
4
nS
NH
Fanout High-Level Output
VCC= max. VOH = 2.7V
20 TTL LOAD
NL
Fanout Low-Level Output
VCC= max. VOL = 0.5V
10 TTL LOAD
DC Electrical Characteristics
Parameter
Test Conditions
Min
Max Unit
Input Pulse Test Conditions
Unit
EIN
Pulse Input Voltage
3.2
Volts
PW
Pulse Width % of Total Delay
150
%
TRI
Pulse Rise Time (0.75 - 2.4 Volts)
2.0
nS
PRR
Pulse Repetition Rate @ Td
≤ 500 nS
1.0
MHz
VCC
Supply Voltage
5.0
Volts
VCC
Supply Voltage
4.75
5.25
V
VIH
High-Level Input Voltage
2.0
V
VIL
Low-Level Input Voltage
0.8
V
IIK
Input Clamp Current
-18
mA
IOH
High-Level Output Current
-1.0
mA
IOL
Low-Level Output Current
20
mA
PW*
Pulse Width of Total Delay
100
%
d*
Duty Cycle
20
%
TA
Operating Free-Air Temperature
0
+70
°C
Recommended
Operating Conditions
Min
Max
Unit
*These two values are inter-dependent.
OUTPUT DELAY TIME PROGRAMMING (nS)
PART
(INHERENT)
DELAY*
DATA INPUT (CBA)
NUMBER
±2 nS
nS
STEP **
000
001
010
011
100
101
110
111
EPA563-1
14
7
14
15
16
17
18
19
20
21
EPA563-2
14
14
14
16
18
20
22
24
26
28
EPA563-3
14
21
14
17
20
23
26
29
32
35
EPA563-4
14
28
14
18
22
26
30
34
38
42
EPA563-5
14
35
14
19
24
29
34
39
44
49
EPA563-6
14
42
14
20
26
32
38
44
50
56
EPA563-7
14
49
14
21
28
35
42
49
56
63
EPA563-8
14
56
14
22
30
38
46
54
62
70
EPA563-9
14
63
14
23
32
41
50
59
68
77
EPA563-10
14
70
14
24
34
44
54
64
74
84
MIN DELAY
DELAY
per
Total delay tolerances ±2 nS or ±5% whichever is greater.
All delays measured at 1.5V level on leading edge, no load (enable = "0"), at 25° C / 5.0 Vdc.
*This valule does not include the inherent delay.
TOTAL
1 ± 0.5 nS
2 ± 0.5 nS
3 ± 0.6 nS
4 ± 0.8 nS
5 ± 1.0 nS
6 ± 1.0 nS
7 ± 1.0 nS
8 ± 1.0 nS
9 ± 1.0 nS
10 ± 1.0 nS
Unless Otherwise Noted Dimensions in Inches
Tolerances:
Fractional = ± 1/32
.XX = ± .030
.XXX = ± .010
16799 SCHOENBORN ST.
NORTH HILLS, CA 91343
TEL: (818) 892-0761
FAX: (818) 894-5791
E L E C T R O N I C S
I N C .
DSA563 8/25/94
QAF-CSO1bb Rev. B 8/25/94
39
Programmable Delay Line
16
VCC
11
10
9
AB
C
4
IN
5
OUT
E
78
G
INPUT DATA
.365
Max.
.100
.88 Max.
.280
PCA
EPA563-1
Date Code
.010
± .002
.150
Typ.
.020
.040
Max.
.250
.020
Typ.
Max.
White Dot Pin#1
1 



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