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CAT706VI-G Datasheet(PDF) 8 Page - Catalyst Semiconductor

Part # CAT706VI-G
Description  關P Supervisory Circuits
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Manufacturer  CATALYST [Catalyst Semiconductor]
Direct Link  http://www.catalyst-semiconductor.com
Logo CATALYST - Catalyst Semiconductor

CAT706VI-G Datasheet(HTML) 8 Page - Catalyst Semiconductor

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CAT705, CAT706, CAT813
Doc. No. MD-3030 Rev. A
8
© Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
WATCHDOG TIMER
The CAT705, CAT706, & CAT813 provide a
Watchdog input (WDI). The watchdog timer function
forces RESET
¯¯¯¯¯¯ (and RESET in the CAT813) signals
active when the WDI input does not have a transition
from low-to-high or high-to-low within 1.12 seconds.
Timeout of the watchdog starts when RESET
¯¯¯¯¯¯ (RESET
on the CAT813) becomes inactive.
If a transition
occurs on the WDI input pin prior to the watchdog
time-out, the watchdog timer is reset and begins to
time-out again. If the watchdog timer is allowed to
time-out, then the reset output(s) will go active for tRP
and once released will repeat the watchdog timeout
process.
Figure 3 below shows a typical implementation of a
watchdog function. Any processor signal that repeats
dependant on the normal operation of the processor
or directed by the software operating on the processor
can be used to strobe the watchdog input. The most
reliable is a dedicated I/O output transitioned by a
specific software instruction.
The watchdog can be disabled by floating (or tri-
stating) the WDI input (see Figure 4). If the watchdog
is disabled the WDI pin will be pulled low for the first
7/8
th’s of the watchdog period (t
WD) and pulled high for
the last 1/8
th of the watchdog period. This pulling low
of the WDI input and then high is used to detect an
open or tri-state condition and will continue to repeat
until the WDI input is driven high or low.
For most efficient operation of devices with the
watchdog function the WDI input should be held low
the majority of the time and only strobed high as
required to reset the watchdog timer.
PIC
µC
DECODER
ADDRESS
MCLR
WDO
PFO
VCC
WDI
GND
PFI
MR
RESET/RESET
CAT705
CAT706
CAT813
Figure 3. Watchdog Timer
Figure 4. Watchdog Disable Circuit
µC
OUTPUT
VCC
Tristate
150kΩ
110kΩ
WDO
PFO
VCC
WDI
GND
PFI
MR
RESET/RESET
CAT705
CAT706
CAT813


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