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04022F105M8B20D Datasheet(PDF) 9 Page - NXP Semiconductors |
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04022F105M8B20D Datasheet(HTML) 9 Page - NXP Semiconductors |
9 / 11 page Phycomp Product specification Surface-mount ceramic multilayer capacitors Class 2, Y5V 16/25/50 V 2003 Jul 08 Rev.7 9 www.yageo.com TESTS AND REQUIREMENTS Table 2 Test procedures and requirements IEC 60384-10/ CECC 32 100 CLAUSE IEC 60068-2 TEST METHOD TEST PROCEDURE REQUIREMENTS 4.4 mounting the capacitors may be mounted on printed-circuit boards or ceramic substrates by applying wave soldering, reflow soldering (including vapour phase soldering) or conductive adhesive no visible damage 4.5 visual inspection and dimension check any applicable method using ×10 magnification in accordance with specification 4.6.1 capacitance f = 1 kHz; Y5V measuring voltage 1 Vrms at 25 °C within specified tolerance 4.6.2 tan δ f = 1 kHz; Y5V measuring voltage 1 Vrms at 25 °C in accordance with specification 4.6.3 insulation resistance at UR (DC) for 1 minute RiCR ≥500 s 4.6.4 voltage proof 2.5 × U R for 1 minute no breakdown or flashover 4.7.1 temperature coefficient between minimum and maximum temperature in accordance with specification 4.8 adhesion a force of 5 N applied for 10 s to the line joining the terminations and in a plane parallel to the substrate no visible damage mounted in accordance with IEC 60384-1, paragraph 4.35 no visible damage 4.9 bond strength of plating on end face conditions: bending 1 mm at a rate of 1 mm/s, radius jig 340 mm ∆C/C: ≤30% resistance to soldering heat preconditioning: 120 to 150 °C during 1 minute; 260 ±5 °C for 10 ±0.5 s in a static solder bath the terminations shall be well tinned after recovery ∆C/C: ±20% tan δ: original specification Rins: original specification 4.10 Tb resistance to leaching 260 ±5 °C for 30 ±1 s in a static solder bath using visual enlargement of ×10, dissolution of the terminations shall not exceed 10% |
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