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04022F105Z7B30D Datasheet(PDF) 10 Page - NXP Semiconductors |
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04022F105Z7B30D Datasheet(HTML) 10 Page - NXP Semiconductors |
10 / 11 page Phycomp Product specification Surface-mount ceramic multilayer capacitors Class 2, Y5V 16/25/50 V 2003 Jul 08 Rev.7 10 www.yageo.com IEC 60384-10/ CECC 32 100 CLAUSE IEC 60068-2 TEST METHOD TEST PROCEDURE REQUIREMENTS 4.11 Ta solderability zero hour test, and test after storage (20 to 24 months) in original packing in normal atmosphere; unmounted chips completely immersed for 2 ±0.5 s in a solder bath at 235 ±5 °C the terminations shall be well tinned 4.12 Na rapid change of temperature preconditioning: between minimum and maximum temperature, 5 cycles no visible damage after 48 hours recovery: ∆°C/C: ≤ ±20% 4.14 Ca damp heat, steady state initialization: 48 ±4 hours after U R at 40 °C for 1 hour (for initial value measurement); 500 ±12 hours at 40 °C; 90 to 95% RH; UR applied no visible damage after 48 hours recovery: ∆°C/C: +30%/−40% tan δ: ≤15% Rins: 500 MΩ or RiCR ≥ 100 s, whichever is less damp heat; with UR load initialization: 48 hours after UR at 40 °C; for 1 hour (for initial value measurement); 500 ±12 hours at 40 °C; 90 to 95% RH; UR applied preconditioning: UR at 40 °C for 1 hour, after 48 hours recovery: ∆°C/C: +30%/−40% tan δ: ≤15% Rins: 500 MΩ or RiCR ≥ 25 s, whichever is less 4.15 endurance initialization: 2 × U R at 85 °C for 1 hour, (initial value measurement after 48 ±4 hours) ; 2 × U R at 85 °C for 1000 hours recovery 48 ±4 hours at room temperature after 48 hours recovery: ∆°C/C: +30%/−40% tan δ: ≤15% Rins: 1000 MΩ or RiCR ≥ 50 s, whichever is less |
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