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MB15F86ULPFT Datasheet(PDF) 9 Page - Fujitsu Component Limited. |
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MB15F86ULPFT Datasheet(HTML) 9 Page - Fujitsu Component Limited. |
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9 / 28 page  MB15F86UL 9 (2) Data Setting •••• RF synthesizer Data Setting (Fractional-N) The divide ratio can be calculated using the following equation : fVCORF = NTOTAL × fosc÷R NTOTAL = P × N + A + F / Q ← (A < N − 2, F < Q) • Binary 8-bit Programmable Reference Counter Data Setting (RF1 to RF8) Note : Divide ratio less than 3 is prohibited. • Fractional-N numerator of the fractional accumulator Data Setting (F1 to F4) Note : F < Q • Fractional-N denominator of the fractional accumulator Data Setting (Q1 to Q5) Note : F < Q fVCORF : Output frequency of external voltage controlled oscillator (VCO) NTOTAL : Total division ratio from prescaler input to the phase detector input fosc : Output frequency of the reference frequency oscillator R : Preset divide ratio of binary 8 bit reference counter (3 to 255) P : Preset divide ratio of modulus prescaler (16 or 32) N : Preset divide ratio of binary 10 bit programmable counter (18 to 1023) A : Preset divide ratio of binary 5 bit swallow counter (0 to 31) F : A numerator of fractional-N (0 to 15) Q : A denominator of fractional-N, modulo 3 to 16 Note : When Q is set more than 10, a prescaler ratio should be set 32. Divide ratio (R) RF8 RF7 RF6 RF5 RF4 RF3 RF2 RF1 3 0 0000011 4 0 0000100 52 00110100 255 1 1111111 Setting value(F) F4 F3 F2 F1 0 0000 1 0001 2 0010 15 1111 Setting value(Q) Q5 Q4 Q3 Q2 Q1 3 00011 4 00100 5 00101 16 10000 |
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