SN54ABT16821, SN74ABT16821

20-BIT BUS-INTERFACE FLIP-FLOPS

WITH 3-STATE OUTPUTS

SCBS216B – JUNE 1992 – REVISED JANUARY 1997

5

POST OFFICE BOX 655303

timing requirements over recommended ranges of supply voltage and operating free-air

temperature (unless otherwise noted) (see Figure 1)

VCC = 5 V,

TA = 25°C

SN54ABT16821

SN74ABT16821

UNIT

MIN

MAX

MIN

MAX

MIN

MAX

fclock

Clock frequency

0

150

0

150

0

150

MHz

tw

Pulse duration, CLK high or low

3.3

3.3

3.3

ns

tsu

Setup time, data before CLK

↑

1.8

1.8

1.8

ns

th

Hold time, data after CLK

↑

1.3

1.3

1.3

ns

switching characteristics over recommended ranges of supply voltage and operating free-air

PARAMETER

FROM

(INPUT)

TO

(OUTPUT)

VCC = 5 V,

TA = 25°C

SN54ABT16821

SN74ABT16821

UNIT

(INPUT)

(OUTPUT)

MIN

TYP

MAX

MIN

MAX

MIN

MAX

fmax

150

150

150

MHz

tPLH

CLK

Q

1.3

3.7

5.1

1.3

6.7

1.3

6.1

ns

tPHL

CLK

Q

1.6

3.9

5.1

1.6

5.8

1.6

5.4

ns

tPZH

OE

Q

1.1

3.2

4.7

1.1

5.8

1.1

5.7

ns

tPZL

OE

Q

1.6

3.8

5

1.6

5.7

1.6

5.6

ns

tPHZ

OE

Q

2

4.5

5.7

2

6.6

2

6.5

ns

tPLZ

OE

Q

1.8

4.1

5.8

1.8

8.4

1.8

7.1

ns

PRODUCT PREVIEW information concerns products in the formative or

design phase of development. Characteristic data and other

specifications are design goals. Texas Instruments reserves the right to

change or discontinue these products without notice.