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STCL1160 Datasheet(PDF) 7 Page - STMicroelectronics |
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STCL1160 Datasheet(HTML) 7 Page - STMicroelectronics |
7 / 17 page STCL1100 STCL1120 STCL1160 Operation 7/17 3 Operation Use of the STCL1xx0 silicon oscillator device is very simple. Once power is applied to VCC pin, a CMOS-compatible square wave output signal is provided on the FOUT output pin (in active mode the Chip Enable (CE) input pin must be at a logic high level). 3.1 Chip Enable (CE) This feature allows the user to stop the clock and significantly reduce the current consumption when the application is put into power saving mode. When used to clock the microprocessor in place of a crystal, the need for chip enable input stems from a difference in the way microprocessors normally disable their clock. In the case of a crystal or ceramic resonator, when going into power saving mode, the processor simply opens the internal Xtal inverter feedback which results in stopping the crystal oscillations; however in the case of the silicon oscillators this would not work and the oscillator would continue to run. So in order to use this feature, one of the microprocessor's output pins must be configured to control the silicon oscillator's Chip Enable (CE) input, see Typical Application Circuit diagram. To minimize standby current of the oscillator device, no internal pull-up resistor is implemented on the CE input, thus the input level must be permanently defined by the controlling signal. 3.2 Transition to disable The device provides additional 32 complete clock cycles after the chip enable input went inactive to allow the clocked microprocessor to complete pipelined instructions before going into sleep mode. Then during disable the output remains low. 3.3 Fast start-up and wake-up from disable The total start-up time until oscillations internally stabilize and remain within specifications is 50 µs max from the point when VCC reached min operating voltage (at power on) or from the point when CE went active (wake-up from disable mode). The output remains low even during initial 16 cycles after CE went active to provide stabilized valid output waveform already from the first output cycle, see Table 3: DC and AC parameters and Figure 8: Start- up output waveform, first cycles zoom (power-on), STCL1120. Compare to milliseconds typical for crystal oscillators or hundreds of microseconds for ceramic resonators. |
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