List of Tables
Table 1.
Documentation Conventions ............................................................................................ 18
Table 3-1.
Memory Map ................................................................................................................... 39
Table 4-1.
Exception Types .............................................................................................................. 41
Table 4-2.
Interrupts ........................................................................................................................ 42
Table 5-1.
JTAG Port Pins Reset State ............................................................................................. 45
Table 5-2.
JTAG Instruction Register Commands ............................................................................... 50
Table 6-1.
System Control Register Map ........................................................................................... 60
Table 7-1.
Hibernation Module Register Map ................................................................................... 116
Table 8-1.
Flash Protection Policy Combinations ............................................................................. 132
Table 8-2.
Flash Resident Registers ............................................................................................... 133
Table 8-3.
Flash Register Map ........................................................................................................ 133
Table 9-1.
GPIO Pad Configuration Examples ................................................................................. 157
Table 9-2.
GPIO Interrupt Configuration Example ............................................................................ 157
Table 9-3.
GPIO Register Map ....................................................................................................... 158
Table 10-1.
16-Bit Timer With Prescaler Configurations ..................................................................... 198
Table 10-2.
Timers Register Map ...................................................................................................... 204
Table 11-1.
Watchdog Timer Register Map ........................................................................................ 231
Table 12-1.
UART Register Map ....................................................................................................... 259
Table 13-1.
SSI Register Map .......................................................................................................... 304
Table 14-1.
Examples of I
2C Master Timer Period versus Speed Mode ............................................... 334
Table 14-2.
Inter-Integrated Circuit (I
2C) Interface Register Map ......................................................... 343
Table 14-3.
Write Field Decoding for I2CMCS[3:0] Field (Sheet 1 of 3) ................................................ 348
Table 15-1.
Transmit Message Object Bit Settings ............................................................................. 370
Table 15-2.
Receive Message Object Bit Settings .............................................................................. 372
Table 15-3.
CAN Protocol Ranges .................................................................................................... 374
Table 15-4.
CAN Register Map ......................................................................................................... 377
Table 16-1.
TX & RX FIFO Organization ........................................................................................... 411
Table 16-2.
Ethernet Register Map ................................................................................................... 414
Table 18-1.
Signals by Pin Number ................................................................................................... 453
Table 18-2.
Signals by Signal Name ................................................................................................. 457
Table 18-3.
Signals by Function, Except for GPIO ............................................................................. 460
Table 18-4.
GPIO Pins and Alternate Functions ................................................................................. 463
Table 19-1.
Temperature Characteristics ........................................................................................... 465
Table 19-2.
Thermal Characteristics ................................................................................................. 465
Table 20-1.
Maximum Ratings .......................................................................................................... 466
Table 20-2.
Recommended DC Operating Conditions ........................................................................ 466
Table 20-3.
LDO Regulator Characteristics ....................................................................................... 467
Table 20-4.
Flash Memory Characteristics ........................................................................................ 468
Table 20-5.
Phase Locked Loop (PLL) Characteristics ....................................................................... 468
Table 20-6.
Clock Characteristics ..................................................................................................... 468
Table 20-7.
Crystal Characteristics ................................................................................................... 469
Table 20-8.
I
2C Characteristics ......................................................................................................... 469
Table 20-9.
100BASE-TX Transmitter Characteristics ........................................................................ 470
Table 20-10.
100BASE-TX Transmitter Characteristics (informative) ..................................................... 470
Table 20-11.
100BASE-TX Receiver Characteristics ............................................................................ 470
Table 20-12.
10BASE-T Transmitter Characteristics ............................................................................ 470
September 02, 2007
10
Preliminary
Table of Contents