Figure 14-13. Slave Command Sequence ............................................................................................ 341
Figure 15-1.
Analog Comparator Module Block Diagram ..................................................................... 365
Figure 15-2.
Structure of Comparator Unit .......................................................................................... 366
Figure 15-3.
Comparator Internal Reference Structure ........................................................................ 367
Figure 16-1.
Pin Connection Diagram ................................................................................................ 377
Figure 19-1.
Load Conditions ............................................................................................................ 396
Figure 19-2.
I2C Timing ..................................................................................................................... 398
Figure 19-3.
Hibernation Module Timing ............................................................................................. 399
Figure 19-4.
SSI Timing for TI Frame Format (FRF=01), Single Transfer Timing Measurement .............. 399
Figure 19-5.
SSI Timing for MICROWIRE Frame Format (FRF=10), Single Transfer ............................. 400
Figure 19-6.
SSI Timing for SPI Frame Format (FRF=00), with SPH=1 ................................................. 400
Figure 19-7.
JTAG Test Clock Input Timing ......................................................................................... 401
Figure 19-8.
JTAG Test Access Port (TAP) Timing .............................................................................. 402
Figure 19-9.
JTAG TRST Timing ........................................................................................................ 402
Figure 19-10. External Reset Timing (RST) .......................................................................................... 403
Figure 19-11. Power-On Reset Timing ................................................................................................. 403
Figure 19-12. Brown-Out Reset Timing ................................................................................................ 403
Figure 19-13. Software Reset Timing ................................................................................................... 404
Figure 19-14. Watchdog Reset Timing ................................................................................................. 404
Figure 20-1.
100-Pin LQFP Package .................................................................................................. 405
9
October 09, 2007
Preliminary
LM3S1911 Microcontroller