6.1.3
Power Control ........................................................................................................................... 53
6.1.4
Clock Control ............................................................................................................................ 53
6.1.5
System Control ......................................................................................................................... 56
6.2
Initialization and Configuration ................................................................................................... 56
6.3
Register Map ............................................................................................................................ 57
6.4
Register Descriptions ................................................................................................................ 58
7
Internal Memory ............................................................................................................... 108
7.1
Block Diagram ........................................................................................................................ 108
7.2
Functional Description ............................................................................................................. 108
7.2.1
SRAM Memory ........................................................................................................................ 108
7.2.2
Flash Memory ......................................................................................................................... 109
7.3
Flash Memory Initialization and Configuration ........................................................................... 111
7.3.1
Changing Flash Protection Bits ................................................................................................ 111
7.3.2
Flash Programming ................................................................................................................. 112
7.4
Register Map .......................................................................................................................... 112
7.5
Flash Register Descriptions (Flash Control Offset) ..................................................................... 113
7.6
Flash Register Descriptions (System Control Offset) .................................................................. 120
8
General-Purpose Input/Outputs (GPIOs) ....................................................................... 124
8.1
Functional Description ............................................................................................................. 124
8.1.1
Data Control ........................................................................................................................... 125
8.1.2
Interrupt Control ...................................................................................................................... 126
8.1.3
Mode Control .......................................................................................................................... 127
8.1.4
Pad Control ............................................................................................................................. 127
8.1.5
Identification ........................................................................................................................... 127
8.2
Initialization and Configuration ................................................................................................. 127
8.3
Register Map .......................................................................................................................... 128
8.4
Register Descriptions .............................................................................................................. 130
9
General-Purpose Timers ................................................................................................. 162
9.1
Block Diagram ........................................................................................................................ 163
9.2
Functional Description ............................................................................................................. 163
9.2.1
GPTM Reset Conditions .......................................................................................................... 163
9.2.2
32-Bit Timer Operating Modes .................................................................................................. 163
9.2.3
16-Bit Timer Operating Modes .................................................................................................. 165
9.3
Initialization and Configuration ................................................................................................. 169
9.3.1
32-Bit One-Shot/Periodic Timer Mode ....................................................................................... 169
9.3.2
32-Bit Real-Time Clock (RTC) Mode ......................................................................................... 170
9.3.3
16-Bit One-Shot/Periodic Timer Mode ....................................................................................... 170
9.3.4
16-Bit Input Edge Count Mode ................................................................................................. 171
9.3.5
16-Bit Input Edge Timing Mode ................................................................................................ 171
9.3.6
16-Bit PWM Mode ................................................................................................................... 172
9.4
Register Map .......................................................................................................................... 172
9.5
Register Descriptions .............................................................................................................. 173
10
Watchdog Timer ............................................................................................................... 198
10.1
Block Diagram ........................................................................................................................ 198
10.2
Functional Description ............................................................................................................. 198
10.3
Initialization and Configuration ................................................................................................. 199
10.4
Register Map .......................................................................................................................... 199
October 01, 2007
4
Preliminary
Table of Contents