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TMS320DM6431 Datasheet(PDF) 5 Page - Texas Instruments |
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TMS320DM6431 Datasheet(HTML) 5 Page - Texas Instruments |
5 / 226 page Contents TMS320DM6431 Digital Media Processor www.ti.com SPRS342C – NOVEMBER 2006 – REVISED JUNE 2008 Ranges of Supply Voltage and Operating 1 TMS320DM6431 Digital Media Processor ........... 1 Temperature (Unless Otherwise Noted) ........... 118 1.1 Features .............................................. 1 6 Peripheral Information and Electrical 1.2 Description ............................................ 2 Specifications ......................................... 119 1.3 Functional Block Diagram ............................ 4 6.1 Parameter Information ............................. 119 Revision History ............................................... 6 6.2 Recommended Clock and Control Signal Transition 2 Device Overview ......................................... 7 Behavior ............................................ 120 2.1 Device Characteristics ................................ 7 6.3 Power Supplies .................................... 121 2.2 CPU (DSP Core) Description ......................... 8 6.4 Enhanced Direct Memory Access (EDMA3) Controller ........................................... 128 2.3 C64x+ CPU .......................................... 11 6.5 Reset ............................................... 140 2.4 Memory Map Summary ............................. 12 6.6 External Clock Input From MXI/CLKIN Pin ........ 149 2.5 Pin Assignments .................................... 16 6.7 Clock PLLs ......................................... 151 2.6 Terminal Functions .................................. 24 6.8 Interrupts ........................................... 156 2.7 Device Support ...................................... 56 2.8 Device and Development-Support Tool 6.9 External Memory Interface (EMIF) ................. 159 Nomenclature ....................................... 56 6.10 Video Processing Sub-System (VPSS) Overview . 168 2.9 Documentation Support ............................. 58 6.11 Universal Asynchronous Receiver/Transmitter (UART) ............................................. 173 3 Device Configurations ................................. 59 6.12 Inter-Integrated Circuit (I2C) ....................... 175 3.1 System Module Registers ........................... 59 6.13 Multichannel Buffered Serial Port (McBSP) ........ 179 3.2 Power Considerations ............................... 60 6.14 Multichannel Audio Serial Port (McASP0) 3.3 Clock Considerations ................................ 62 Peripheral .......................................... 188 3.4 Boot Sequence ...................................... 63 6.15 High-End Controller Area Network Controller 3.5 Configurations At Reset ............................. 74 (HECC) ............................................. 196 3.6 Configurations After Reset .......................... 75 6.16 Ethernet Media Access Controller (EMAC) ........ 202 3.7 Multiplexed Pin Configurations ...................... 79 6.17 Management Data Input/Output (MDIO) .......... 209 3.8 Device Initialization Sequence After Reset ........ 111 6.18 Timers .............................................. 210 3.9 Debugging Considerations ......................... 113 6.19 Pulse Width Modulator (PWM) ..................... 213 4 System Interconnect ................................. 114 6.20 General-Purpose Input/Output (GPIO) ............. 215 4.1 System Interconnect Block Diagram ............... 114 6.21 IEEE 1149.1 JTAG ................................. 219 5 Device Operating Conditions ....................... 116 7 Mechanical Data ....................................... 221 5.1 Absolute Maximum Ratings Over Operating 7.1 Thermal Data for ZWT ............................. 221 Temperature Range (Unless Otherwise Noted) ... 116 7.1.1 Thermal Data for ZDU ............................. 222 5.2 Recommended Operating Conditions ............. 117 7.1.2 Packaging Information ............................. 222 5.3 Electrical Characteristics Over Recommended Submit Documentation Feedback Contents 5 |
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