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ST7265C4M0 Datasheet(PDF) 10 Page - STMicroelectronics |
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ST7265C4M0 Datasheet(HTML) 10 Page - STMicroelectronics |
10 / 166 page ST7265x 10/166 PIN DESCRIPTION (Cont’d) Legend / Abbreviations: Type: I = input, O = output, S = supply VDDF powered: I/O powered by the alternate sup- ply rail, supplied by VDDF and VSSF. In/Output level: CT = CMOS 0.3VDD/0.7VDD with input trigger Output level: HS = High Sink (on N-buffer only) Port and control configuration: – Input:float = floating, wpu = weak pull-up, int = in- terrupt – Output: OD = open drain, T = true open drain, PP = push-pull, OP = pull-up enabled by option byte. Refer to “I/O PORTS” on page 49 for more details on the software configuration of the I/O ports. The RESET configuration of each pin is shown in bold. Table 1. Device Pin Description Pin Pin Name Level Port / Control Main Function (after reset) Alternate Function Input Output 51 1 USBVSS S USB Digital ground 6 2 2 USBDM I/O USB bidirectional data (data -) 7 3 3 USBDP I/O USB bidirectional data (data +) 8 4 4 USBVCC O USB power supply, output by the on-chip USB 3.3V linear regulator. Note: An external decoupling capacitor (typ. 100nF, min 47nF) must be connected be- tween this pin and USBVSS. 95 5 USBVDD S USB Power supply voltage (4V - 5.5V) Note: External decoupling capacitors (typ. 4.7µF+100nF, min 2.2µF+100nFmust be con- nected between this pin and USBVSS. 10 6 6 VDDF SX Power Line for alternate supply rail. Can be used as input (with external supply) or output (when using the on-chip voltage regulator). Note: An external decoupling capacitor (min. 20nF) must be connected to this pin to stabi- lize the regulator. 11 7 7 VSSF SX Ground Line for alternate supply rail. Can be used as input (with external supply) or output (when using the on-chip voltage regulator) - - 8 PE5/DTC I/O X CT HS X 2 X2 X Port E5 DTC I/O with serial capability (MMC_CMD) - - 9 PE6/DTC I/O X CT HS X X X Port E6 DTC I/O with serial capability (MMC_DAT) - - 10 PE7/DTC I/O X CT HS X X X Port E7 DTC I/O with serial capability (MMC_CLK) - 8 11 PB0/DTC I/O X C T X X Port B0 DTC - 9 12 PB1/DTC I/O X C T X X Port B1 DTC - 10 13 PB2/DTC I/O X C T X X Port B2 DTC 1 |
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