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EM7643SU16HY-10LL Datasheet(PDF) 6 Page - Emerging Memory & Logic Solutions Inc |
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EM7643SU16HY-10LL Datasheet(HTML) 6 Page - Emerging Memory & Logic Solutions Inc |
6 / 11 page EM7643SU16H 4Mx16 Async. / Page StRAM 6 Preliminary Rev. 0.0 AC CHARACTERISTICS (Vcc = 2.6 to 3.3V, Gnd = 0V, TA = -25 oC to +85oC) (SEE NOTE 5-11) Symbol Parameter List Speed Unit Min Max tRC Read Cycle Time 65 10000 ns tACC Address Access Time - 65 ns tCO Chip Enable(CE1) Access Time - 65 ns tOE Output Enable Access Time - 25 ns tBA Data Byte Control Access Time - 65 ns tCOE Chip Enable Low to Output Active 10 - ns tOEE Output Enable Low to Output Active 0 - ns tBE Data Byte Control Low to Output Active 0 - ns tOD Chip Enable High to Ouput High-Z - 20 ns tODO Output Enable High to Output High-Z - 20 ns tBD Data Byte Control High to Output High-Z - 20 ns tOH Output Data Hold Time 5 - ns tPM Page Mode Time 65 10000 ns tPC Page Mode Cycle Time 20 - ns tAA Page Mode Address Access Time - 20 ns tAOH Page Mode Output Data Hold Time 5 - ns tWC Write Cycle Time 65 10000 ns tWP Write Pulse Width 50 - ns tCW Chip Enable to End of Write 65 - ns tBW Data Byte Control to End of Write 60 - ns tAW Address Valid to End of Write 60 - ns tAS Address Set-up Time 0 - ns tWR Write Recovery Time 0 - ns tCEH Chip Enable High Pulse Width 10 - ns tWEH Write Enable High Pulse Width 6 - ns tODW WE Low to Output High-Z - 20 ns tOEW WE High to Output Active 0 - ns tDS Data Set-up Time 30 - ns tDH Data Hold Time 0 - ns tCS CE2 Set-up Time 0 - ns tCH CE2 Hold Time 300 - us tDPD CE2 Pulse Width 10 - ms tCHC CE2 Hold from CE1 0- ns tCHP CE2 Hold from Power On 30 - us PARAMETER CONDITION Output load 50 ohm+0.5 * VDD Input pulse level VDD-0.2V, 0.2V Timing measurements VDD * 0.5 Reference level VDD * 0.5 tR, tF 5 ns AC TEST CONDITIONS |
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