Electronic Components Datasheet Search |
|
V54C3128 Datasheet(PDF) 1 Page - Mosel Vitelic, Corp |
|
V54C3128 Datasheet(HTML) 1 Page - Mosel Vitelic, Corp |
1 / 45 page MOSEL VITELIC 1 V54C3128(16/80/40)4V(BGA) 128Mbit SDRAM 3.3 VOLT, BGA PACKAGE 8M X 16 16M X 8 32M X 4 V54C3128(16/80/40)4V(BGA) Rev. 1.2 September 2001 PRELIMINARY 67PC 78PC System Frequency (fCK) 166 MHz 143 MHz 143 MHz 125 MHz Clock Cycle Time (tCK3) 6 ns 7 ns 7 ns 8 ns Clock Access Time (tAC3)CAS Latency = 3 5.4 ns 5.4 ns 5.4 ns 6 ns Clock Access Time (tAC2) CAS Latency = 2 5.4 ns 5.4 ns 6 ns 6 ns Features s 4 banksx2Mbit x16 organization s 4 banks x 4Mbit x 8 organization s 4 banks x 8Mbit x 4 organization s High speed data transfer rates up to 166 MHz s Full Synchronous Dynamic RAM, with all signals referenced to clock rising edge s Single Pulsed RAS Interface s Data Mask for Read/Write Control s Four Banks controlled by BA0 & BA1 s Programmable CAS Latency: 2, 3 s Programmable Wrap Sequence: Sequential or Interleave s Programmable Burst Length: 1, 2, 4, 8 for Sequential Type 1, 2, 4, 8 for Interleave Type s Multiple Burst Read with Single Write Operation s Automatic and Controlled Precharge Command s Random Column Address every CLK (1-N Rule) s Power Down Mode s Auto Refresh and Self Refresh s Refresh Interval: 4096 cycles/64 ms s Availablein60Pin WBGA s LVTTL Interface s Single +3.3 V ±0.3 V Power Supply Description The V54C3128(16/80/40)4V(BGA) is a four bank Synchronous DRAM organized as 4 banks x 2Mbit x 16, 4 banks x 4Mbit x 8, or 4 banks x 8Mbit x 4. The V54C3128(16/80/40)4V(BGA) achieves high speed data transfer rates up to 166 MHz by employ- ing a chip architecture that prefetches multiple bits and then synchronizes the output data to a system clock All of the control, address, data input and output circuits are synchronized with the positive edge of an externally supplied clock. Operating the four memory banks in an inter- leaved fashion allows random access operation to occur at higher rate than is possible with standard DRAMs. A sequential and gapless data rate of up to 166 MHz is possible depending on burst length, CAS latency and speed grade of the device. Device Usage Chart Operating Temperature Range Package Outline Access Time (ns) Power Temperature Mark B6 7PC 7 8PC Std. L 0 °Cto 70°C • •• ••• • Blank |
Similar Part No. - V54C3128 |
|
Similar Description - V54C3128 |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.NET |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |