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INA333AIDGKT Datasheet(PDF) 11 Page - Texas Instruments |
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INA333AIDGKT Datasheet(HTML) 11 Page - Texas Instruments |
11 / 23 page APPLICATION INFORMATION SETTING THE GAIN A 1 A 2 A 3 6 150kW 150kW 150kW 150kW 7 4 3 8 1 2 V IN- V IN+ R G V+ V- INA333 G=1+ 100kW R G 5 RFIFilter 50kW 50kW RFIFilter Load V =G (V ´ V - ) O IN+ IN- 0.1 F m 0.1 F m + - V O R G Alsodrawninsimplifiedform: INA333 Ref V O V IN- V IN+ Ref RFIFilter RFIFilter INA333 www.ti.com ...................................................................................................................................................................................................... SBOS445 – JULY 2008 Figure 32 shows the basic connections required for Table 1 lists several commonly-used gains and operation of the INA333. Good layout practice resistor values. The 100k Ω term in Equation 1 comes mandates the use of bypass capacitors placed close from the sum of the two internal feedback resistors of to the device pins as shown. A1 and A2. These on-chip resistors are laser trimmed to accurate absolute values. The accuracy and The output of the INA333 is referred to the output temperature coefficient of these resistors are included reference (REF) terminal, which is normally in the gain accuracy and drift specifications of the grounded. This connection must be low-impedance to INA333. assure good common-mode rejection. Although 15 Ω or less of stray resistance can be tolerated while The stability and temperature drift of the external gain maintaining specified CMRR, small stray resistances setting resistor, RG, also affects gain. The contribution of tens of ohms in series with the REF pin can cause of RG to gain accuracy and drift can be directly noticeable degradation in CMRR. inferred from the gain Equation 1. Low resistor values required for high gain can make wiring resistance important. Sockets add to the wiring resistance and contribute additional gain error (possibly an unstable Gain of the INA333 is set by a single external gain error) in gains of approximately 100 or greater. resistor, RG, connected between pins 1 and 8. The To ensure stability, avoid parasitic capacitance of value of RG is selected according to Equation 1: more than a few picofarads at the RG connections. Careful matching of any parasitics on both RG pins G = 1 + (100k Ω/RG) (1) maintains optimal CMRR over frequency. Figure 32. Basic Connections Copyright © 2008, Texas Instruments Incorporated Submit Documentation Feedback 11 Product Folder Link(s): INA333 |
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