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TPS23753PWG4 Datasheet(PDF) 3 Page - Texas Instruments |
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TPS23753PWG4 Datasheet(HTML) 3 Page - Texas Instruments |
3 / 27 page RECOMMENDED OPERATING CONDITIONS ELECTRICAL CHARACTERISTICS TPS23753 www.ti.com.............................................................................................................................................................. SLVS853A – JUNE 2008 – REVISED JUNE 2008 Voltage with respect to VSS (unless otherwise noted) MIN NOM MAX UNIT Input voltage range, VDD, VDD1, RTN 0 57 V Input voltage range, VDD, VDD1 to RTN 0 57 V VI Input voltage range, VC to RTN 0 18 V Input voltage range, APD, CTL to RTN 0 VB V Input voltage range, CS to RTN 0 2 V RTN current (TJ ≤ 125°C) 350 mA VB sourcing current 0 2.5 5 mA VB capacitance 0.08 0.1 2.2 µF RBLNK 0 350 k Ω Synchronization pulse width input (when used) 25 150 ns TJ Operating junction temperature range –40 125 °C Unless otherwise noted: CS = APD = CTL = RTN, GATE open, RFRS = 60.4 kΩ, RBLNK = 249 kΩ, CVB = CVC = 0.1 µF, RDEN = 24.9 k Ω, RCLS open, VVDD-VSS = 48 V, VVDD1-RTN = 48 V, 8.5 V ≤ VVC-RTN ≤ 18 V, –40°C ≤ TJ ≤ 125°C Controller Section Only [VSS = RTN and VDD = VDD1] or [VSS = RTN = VDD], all voltages referred to RTN. Typical specifications are at 25°C. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VC UVLO1 VC rising 8.65 9 9.3 Undervoltage lockout V UVLOH Hysteresis(1) 3.3 3.5 3.7 Operating current VC = 12 V, CTL = VB 0.40 0.58 0.85 mA VDD1 = 10.2 V, VC(0) = 0 V 50 85 175 tST Startup time, CVC = 22 µF ms VDD1 = 35 V, VC(0) = 0 V 30 48 85 VDD1 = 10.2 V, VVC = 8.6 V 0.44 1.06 1.80 Startup current source - IVC mA VDD1 = 48 V, VVC = 0 V 2.5 4.3 6.0 VB Voltage 6.5 V ≤ VC ≤ 18 V, 0 ≤ IVB ≤ 5 mA 4.75 5.10 5.25 V FRS CTL= VB, Measure GATE Switching frequency 223 248 273 kHz RFRS = 60.4 kΩ DMAX Duty cycle CTL= VB, Measure GATE 76 78.5 81 % VSYNC Synchronization Input threshold 2.0 2.2 2.4 V CTL VZDC 0% duty cycle threshold VCTL ↓ until GATE stops 1.3 1.5 1.7 V Softstart period Interval from switching start to VCSMAX 400 800 µs Input resistance 70 100 145 k Ω BLNK In addition to t1 Blanking delay BLNK = RTN 35 52 75 ns RBLNK = 49.9 kΩ 41 52 63 CS VCSMAX Maximum threshold voltage VCTL = VB, VCS ↑ until GATE duty cycle drops 0.50 0.55 0.60 V t1 Turn off delay VCS = 0.65 V 25 41 60 ns VSLOPE Internal slope compensation voltage Peak voltage at maximum duty cycle, referred to CS 90 118 142 mV ISL_EX Peak slope compensation current VCTL = VB, ICS at maximum duty cycle (ac component) 30 42 54 µA Bias current (sourcing) Gate high, dc component of CS current 2 3 4.2 µA (1) The hysteresis tolerance tracks the rising threshold for a given device. Copyright © 2008, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Link(s): TPS23753 |
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