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OMAP3515 Datasheet(PDF) 4 Page - Texas Instruments |
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OMAP3515 Datasheet(HTML) 4 Page - Texas Instruments |
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4 / 262 page  OMAP3515/03 Applications Processor SPRS505B – FEBRUARY 2008 – REVISED JULY 2008 www.ti.com Table 1-1. Differences Between CBB, CBC, and CUS Packages FEATURE CBB PACKAGE CBC PACKAGE CUS PACKAGE For CBB package pin For CBC package pin For CUS package pin Pin Assignments assignments seeTable 2-1, Ball assignments see Table 2-2, Ball assignments see Table 2-3, Ball Characteristics (CBB Pkg.) Characteristics (CBC Pkg.) Characteristics (CUS Pkg.) Package-On-Package (POP) POP interface supported POP interface supported POP interface not available Interface Discrete Memory Interface Discrete Memory Interface not Discrete Memory Interface Discrete Memory Interface supported supported supported Chip select pins gpmc_ncs1 and Eight chip select pins available Eight chip select pins available gpmc_ncs2 are not available GPMC Wait pins gpmc_wait1 and Four wait pins available Four wait pins available gpmc_wait2 are not available CTS signal is available on 3 pins The following signals are CTS signal is available on 3 pins (triple muxed): uart2_cts (AG22 / available on one pin only: (triple muxed): uart2_cts (AC19 / UART1 W8 / T21), uart2_rts (AH22 / uart2_cts (AE21 / T19), uart2_rts AC2 / AA18), uart2_rts (W6 / AA9), uart2_tx (F28 / Y8 / AE7), (AE22 / R2), uart2_tx (H3 / H25 / AB19), uart2_tx (E23 / V7 / AC3), uart2_rx (E26 / AA8) AE4), uart2_rx (L4 / G26) uart2_rx (D24 / W7) The following signals are The following signals are available on two pins (double The following signals are available on one pin only: muxed): uart2_cts (AF6/AB26), available on one pin only: UART2 uart2_cts (Y24), uart2_rts uart2_rts (AE6/AB25), uart2_tx uart2_cts (V6), uart2_rts (V5), (AA24), uart2_tx (AD22), (AF5/AA25), uart2_rx uart2_tx (W4), uart2_rx (V4) uart2_rx (AD21) (AE5/AD25) The following signals are The following signals are The following signals are available on three pins (triple available on two pins (double available on two pins only muxed): mcbsp3_dx (AF6 / AB26 muxed): mcbsp3_dx (U17/ Y24), (double muxed): mcbsp3_dx McBSP3 / V21), mcbsp3_dr (AE6 / AB25 / mcbsp3_dr (T20/ AA24), (TBD), mcbsp3_dr (TBD), U21), mcbsp3_clkx (AF5 / AA25 / mcbsp3_clkx (T17/ AD22), mcbsp3_clkx (TBD), and W21), and mcbsp3_fsx (AE5 / mcbsp3_fsx (P20/ AD21) mcbsp3_fsx (TBD) AD25 / K26) The following signals are The following signals are The following signals are available on three pins (triple available on three pins (triple available on two pins only muxed): gpt8_pwm_evt (N8 / muxed): gpt8_pwm_evt (double muxed): gpt8_pwm_evt GP Timer AD25 / V3), gpt9_pwm_evt (T8 / (C5/AD21/V9), gpt9_pwm_evt (TBD), gpt9_pwm_evt (TBD), AB26 / Y2), gpt10_pwm_evt (R8 (B4/W8/Y24), gpt10_pwm_evt (TBD), and / AB25 / Y3), and gpt10_pwm_evt(C4/U8/AA24), gpt11_pwm_evt (TBD) gpt11_pwm_evt (P8 / AA25 / Y4) gpt11_pwm_evt(B5/V8/AD22) The following signals are The following signals are The following signals are available on two pins (double available on one pin only: available on one pin only: muxed): mcbsp4_clkx (T8/AE1), McBSP4 mcbsp4_clkx (B4), mcbsp4_dr mcbsp4_clkx (TBD), mcbsp4_dr mcbsp4_dr (R8/AD1), (C4), mcbsp4_dx (B5), (TBD), mcbsp4_dx (TBD), mcbsp4_dx (P8/AD2), mcbsp4_fsx (C5) mcbsp4_fsx (TBD) mcbsp4_fsx (N8/AC1) HSUSB3_TLL Supported Supported Not supported MM_FSUSB3 Supported Supported Not supported Four chip select pins are Four chip select pins are Chip select pins mcspi1_cs1 and McSPI1 available available mcspi_cs2 are not available The following signals are The following signals are The following signals are available on two pins (double available on two pins (double available on one pin only: MMC3 muxed): mmc3_cmd (AC3 / muxed): mmc3_cmd (R8 / AB3), mmc3_cmd (TBD), and AE10), and mmc3_clk (AB1 / mmc3_clk (R9 / AB2) mmc3_clk (TBD) AF10) 4 OMAP3515/03 Applications Processor Submit Documentation Feedback |
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