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XOMAP3503BCBB Datasheet(PDF) 6 Page - Texas Instruments |
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XOMAP3503BCBB Datasheet(HTML) 6 Page - Texas Instruments |
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6 / 262 page  64 64 Async 64 64 L2$ 256K MPU Subsystem ARMCortex- A8 TM Core 16K/16KL1$ 2D/3D Graphics Accelerator (3515Only) 32 32 32 Channel System DMA 32 32 Parallel TV Amp LCDPanel CVBS or S-Video DualOutput3-Layer DisplayProcessor (1xGraphics,2xVideo) TemporalDithering SDTV QCIFSupport ® 32 Camera ISP Image Capture Hardware Image Pipeline and Preview Dual- Camera (serialand Parallel) 64 HSUSB Host (with USB TTL) HS USB OTG 32 L3InterconnectNetwork-Hierarchial,Performance,andPowerDriven 64K On-Chip RAM 2KB Public/ 62KB Secure 32 112K On-Chip ROM 80KB Secure/ 32KB BOOT 32 SMS: SDRAM Memory Scheduler/ Rotation 64 SDRC: SDRAM Memory Controller L4Interconnect 32 System Controls PRCM 2xSmartReflex TM Control Module External Peripherals Interfaces Peripherals: 3xUART,3xHigh-SpeedI2C, 5xMcBSP (2xwithSidetone/AudioBuffer) 4xMcSPI,6xGPIO, 3xHigh-SpeedMMC/SDIO, HDQ/1Wire, 2xMailboxes 12xGPTimers,2xWDT, 32KSyncTimer GPMC: General Purpose Memory Controller NAND/ NOR Flash, SRAM 32 Emulation Debug:SDTI,ETM,JTAG, Coresight TM DAP Externaland StackedMemories 32 OMAP ApplicationsProcessor OMAP3515/03 Applications Processor SPRS505B – FEBRUARY 2008 – REVISED JULY 2008 www.ti.com Figure 1-1. OMAP3515/03 Functional Block Diagram 6 OMAP3515/03 Applications Processor Submit Documentation Feedback |
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