ADS62P45IRGCRG4 datasheet(10/70 Pages) TI

Part #	ADS62P45IRGCRG4

Description	DUAL CHANNEL, 14-BITS, 125/105/80/65 MSPS ADC WITH DDR LVDS/CMOS OUTPUTS

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Manufacturer	TI [Texas Instruments]

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T0105-06

E

O

Input

Clock

CLKOUTM

CLKOUTP

OutputData

DXP,DXM

DDR

LVDS

N–10

N–9

N–1

N

N+1

N+2

N–9

N–10

N

N+2

CLKOUT

OutputData

D0–D13

Parallel

CMOS

Input

Signal

Sample

N

N+1

N+2

N+3

N+4

t

h

t

PDI

t

a

t

su

t

h

t

PDI

CLKM

CLKP

N+14

N+15

N+16

t

su

E – EvenBitsD0,D2,D4,D6,D8,D10,D12

O – OddBitsD1,D3,D5,D7,D9,D11,D13

N+1

N–1

14ClockCycles

(1)

14ClockCycles

(1)

E

T0107-02

Input

Clock

Output

Clock

Output

Data

CLKM

Dn

CLKP

t

PDI

t

su

t

h

CLKOUT

(1)

Dn – BitsD0toD13

Dn

(1)

T0106-04

Input

Clock

Output

Clock

Output

DataPair

CLKM

CLKOUTM

Dn_Dn+1_P,

Dn_Dn+1_M

CLKP

t

PDI

t

h

t

h

t

su

t

su

CLKOUTP

(1)

Dn

– BitsD0,D2,D4,D6,D8,D10,D12

(2)

Dn+1 – BitsD1,D3,D5,D7,D9,D11,D13

Dn

(1)

Dn+1

(2)

ADS62P45, ADS62P44

ADS62P43, ADS62P42

SLAS561A – JULY 2007 – REVISED FEBRUARY 2008

(1)

Latency is 10 clock cycles in low-latency mode.

Figure 1. Latency

Figure 3. CMOS Mode Timing

Figure 2. LVDS Mode Timing

10

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Product Folder Link(s): ADS62P45, ADS62P44 ADS62P43, ADS62P42

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ADS62P45IRGCRG4 Datasheet(PDF) 10 Page - Texas Instruments

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