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ADUM1310BRWZ-RL1 Datasheet(PDF) 8 Page - Analog Devices |
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ADUM1310BRWZ-RL1 Datasheet(HTML) 8 Page - Analog Devices |
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8 / 24 page  ADuM1310/ADuM1311 Rev. G | Page 8 of 24 Parameter Symbol Min Typ Max Unit Test Conditions Logic Low Input Threshold VIL VDDX = 5 V Operation 0.8 V VDDX = 3 V Operation 0.4 V (VDD1 or VDD2) − 0.1 (VDD1 or VDD2) V IOx = −20 μA, VIx = VIxH Logic High Output Voltages VOAH, VOBH, VOCH (VDD1 or VDD2) − 0.4 (VDD1 or VDD2) − 0.2 V IOx = −4 mA, VIx = VIxH 0.0 0.1 V IOx = 20 μA, VIx = VIxL Logic Low Output Voltages VOAL, VOBL,,VOCL 0.2 0.4 V IOx = 4 mA, VIx = VIxL SWITCHING SPECIFICATIONS ADuM131xARWZ Minimum Pulse Width2 PW 1000 ns CL = 15 pF, CMOS signal levels Maximum Data Rate3 1 Mbps CL = 15 pF, CMOS signal levels Propagation Delay4 tPHL, tPLH 25 100 ns CL = 15 pF, CMOS signal levels Pulse Width Distortion |tPLH − tPHL|4 PWD 40 ns CL = 15 pF, CMOS signal levels Propagation Delay Skew5 tPSK 50 ns CL = 15 pF, CMOS signal levels Channel-to-Channel Matching6 tPSKCD/OD 50 ns CL = 15 pF, CMOS signal levels ADuM131xBRWZ Minimum Pulse Width2 PW 100 ns CL = 15 pF, CMOS signal levels Maximum Data Rate3 10 Mbps CL = 15 pF, CMOS signal levels Propagation Delay4 tPHL, tPLH 20 60 ns CL = 15 pF, CMOS signal levels Pulse Width Distortion, |tPLH − tPHL|4 PWD 5 ns CL = 15 pF, CMOS signal levels Change vs. Temperature 5 ps/°C CL = 15 pF, CMOS signal levels Propagation Delay Skew5 tPSK 30 ns CL = 15 pF, CMOS signal levels Channel-to-Channel Matching, Codirectional Channels6 tPSKCD 5 ns CL = 15 pF, CMOS signal levels Channel-to-Channel Matching, Opposing-Directional Channels6 tPSKOD 6 ns CL = 15 pF, CMOS signal levels For All Models Output Rise/Fall Time (10% to 90%) tR/tF CL = 15 pF, CMOS signal levels 5 V/3 V Operation 2.5 ns 3 V/5 V Operation 2.5 ns Common-Mode Transient Immunity at Logic High Output7 |CMH| 25 35 kV/μs VIx = VDD1 or VDD2, VCM = 1000 V, transient magnitude = 800 V Common-Mode Transient Immunity at Logic Low Output7 |CML| 25 35 kV/μs VIx = 0 V, VCM = 1000 V, transient magnitude = 800 V Refresh Rate fr 5 V/3 V Operation 1.2 Mbps 3 V/5 V Operation 1.1 Mbps Input Enable Time8 tENABLE 2.0 μs VIA, VIB, VIC, VID = 0 V or VDD1 Input Disable Time8 tDISABLE 5.0 μs VIA, VIB, VIC, VID = 0 V or VDD1 Input Supply Current per Channel, Quiescent9 VDDX = 5 V Operation IDDI (Q) 0.50 0.73 mA VDDX = 3 V Operation IDDI (Q) 0.25 0.38 mA Output Supply Current per Channel, Quiescent9 VDDX = 5 V Operation IDDO (Q) 0.38 0.53 mA VDDX = 3 V Operation IDDO (Q) 0.19 0.33 mA Input Dynamic Supply Current per Channel10 IDDI (D) VDDX = 5 V Operation 0.12 mA/ Mbps VDDX = 3 V Operation 0.07 mA/ Mbps |
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