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AT89C51RB2-3CSIM Datasheet(PDF) 2 Page - ATMEL Corporation |
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AT89C51RB2-3CSIM Datasheet(HTML) 2 Page - ATMEL Corporation |
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2 / 127 page  2 AT89C51RB2/RC2 4180C–8051–12/03 The AT89C51RB2/RC2 retains all features of the 80C52 with 256 Bytes of internal RAM, a 9-source 4-level interrupt controller and three timer/counters. In addition, the AT89C51RB2/RC2 has a Programmable Counter Array, an XRAM of 1024 Bytes, a Hardware Watchdog Timer, a Keyboard Interface, an SPI Interface, a more versatile serial channel that facilitates multiprocessor communication (EUART) and a speed improvement mechanism (X2 mode). The Pinout is the standard 40/44 pins of the C52. The fully static design reduces system power consumption of the AT89C51RB2/RC2 by allowing it to bring the clock frequency down to any value, even DC, without loss of data. The AT89C51RB2/RC2 has 2 software-selectable modes of reduced activity and 8-bit clock prescaler for further reduction in power consumption. In Idle mode, the CPU is fro- zen while the peripherals and the interrupt system are still operating. In power-down mode, the RAM is saved and all other functions are inoperative. The added features of the AT89C51RB2/RC2 make it more powerful for applications that need pulse width modulation, high speed I/O and counting capabilities such as alarms, motor control, corded phones, and smart card readers. Table 1. Memory Size Part Number Flash (Bytes) XRAM (Bytes) TOTAL RAM (Bytes) I/O AT89C51RB2 16K 1024 1280 32 AT89C51RC2 32K 1024 1280 32 AT89C51IC2 32K 1024 1280 32 |
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