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AT83SND2C Datasheet(PDF) 8 Page - ATMEL Corporation

Part # AT83SND2C
Description  Single-Chip Flash Microcontroller with MP3 Decoder with Full Audio Interface
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Manufacturer  ATMEL [ATMEL Corporation]
Direct Link  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

AT83SND2C Datasheet(HTML) 8 Page - ATMEL Corporation

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8
AT8xC51SND2C
4341D–MP3–04/05
Table 11. External Access Signal Description
Note:
1. For ROM/Flash/ROMless Dice product versions only.
Table 12. System Signal Description
Table 13. Power Signal Description
Signal
Name
Type
Description
Alternate
Function
A15:8
I/O
Address Lines
Upper address lines for the external bus.
Multiplexed higher address and data lines for the IDE interface.
P2.7:0
AD7:0
I/O
Address/Data Lines
Multiplexed lower address and data lines for the external memory or the
IDE interface.
P0.7:0
ALE
O
Address Latch Enable Output
ALE signals the start of an external bus cycle and indicates that valid
address information is available on lines A7:0. An external latch is used
to demultiplex the address from address/data bus.
-
ISP
I/O
ISP Enable Input (AT89C51SND2C Only)
This signal must be held to GND through a pull-down resistor at the
falling reset to force execution of the internal bootloader.
-
RD
O
Read Signal
Read signal asserted during external data memory read operation.
P3.7
WR
O
Write Signal
Write signal asserted during external data memory write operation.
P3.6
EA(1)
I
External Access Enable: EA must be externally held low to enable the
device to fetch code from external program memory locations 0000H to
FFFFH (RD).
-
Signal
Name
Type
Description
Alternate
Function
RST
I
Reset Input
Holding this pin high for 64 oscillator periods while the oscillator is
running resets the device. The Port pins are driven to their reset
conditions when a voltage lower than VIL is applied, whether or not the
oscillator is running.
This pin has an internal pull-down resistor which allows the device to be
reset by connecting a capacitor between this pin and VDD.
Asserting RST when the chip is in Idle mode or Power-Down mode
returns the chip to normal operation.
-
TST
I
Test Input
Test mode entry signal. This pin must be set to VDD.
-
Signal
Name
Type
Description
Alternate
Function
VDD
PWR
Digital Supply Voltage
Connect these pins to +3V supply voltage.
-
VSS
GND
Circuit Ground
Connect these pins to ground.
-


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