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A6281 Datasheet(PDF) 7 Page - Allegro MicroSystems |
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A6281 Datasheet(HTML) 7 Page - Allegro MicroSystems |
7 / 11 page 3-Channel Constant Current LED Driver with Programmable PWM Control A6281 7 Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com The relationship of the PWMn value to the output duty cycle is given in the following table: PWMn Duty Cycle 0 0/1024 (0 %) 1 2/1024 2 3/1024 . . . . . . 1023 1024/1024 (100 %) When the brightness register is set to zero, the outputs remain off for the duration of the PWM cycle for a 0% DC. When a bright- ness register is set to 1023, the LED for that output remains on (100% DC) when OEI is active and begins the PWM cycle. The output remains on when the PWM counter rolls over and begins a new count. The PWM counter begins counting at zero and increments only when the OEI pin is held low. When the PWM counter reaches the count of 1024, the counter resets to zero and continues incrementing. The counter resets to zero on a rising edge of OEI, upon recovery from UVLO, or when powering up. Latching new data into the brightness registers will not reset the PWM counter. A free-running internal 800 kHz oscillator is the master clock for the PWM counter. A programmable clock divider frequency allows the PWM to be set at approximately at 200 kHz, 400 kHz, or 800 kHz, or the PWM can be set to count on the rising edge of the external CI signal. Bit assignments for the programmable clock divider are shown in the following table: Bits Clock Mode 78 0 0 800 kHz 1 0 400 kHz 01 External (count on rising edge of CI signal) 1 1 200 kHz The total number of possible colors of an RGB pixel is over 1 billion. Refer to figure 4 for the mapping of shift register bits to latches. Output Current Selection The overall maximum current is set by the external resistor, REXT, connected between the REXT and LGND pins. After being set, the maximum current remains constant regardless of the LED voltage variation, supply voltage variation, temperature, or other circuit parameters. The maximum output current can be calculated using the following equation: IOUT(max) = 753.12 / REXT. The relationship of the value selected for REXT and IOUT is shown in figure 6. Internal Linear Regulator The A6281 has a built-in linear regulator. The regulator operates from a supply voltage of 5.5 to 17 V. It allows the VIN pin of the A6281 to connect to the same supply as the LEDs. This simpli- fies board design by eliminating the need for a chip supply bus and external voltage regulators. For 5 V supplies, connect VIN to VREG externally. Note: When using 5 V supplies, ensure that VIN does not exceed the absolute maximum rating of the VREG pin (6 V). The VREG pin is used by the internal linear regulator to connect to a bypass capacitor. This pin is for internal use only and is not Bits 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30a 31 PWM Counter 0 PWM Counter 1 PWM Counter 2 Address “0” Xb Dot Correction Register 0 Clock Mode X Dot Correction Register 1 XXX Dot Correction Register 2 XATBc ATBc Address “1” X aSelects which word is written to: Dot Correction/Clock Mode selection or PWM counter. bX indicates “Don’t Care.” cAllegro Test Bit (ATB). Reserved for Allegro internal testing. Always set to zero (0) in the application. Figure 5. Register Configuration 0 10 20 30 40 50 60 70 80 90 100 110 120 130 140 150 515 25 35 45 55 65 75 REXT (kΩ) Figure 6. Output Current versus External Resistor, REXT |
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