13-32

ICM7216A, ICM7216B, ICM7216D

Time Interval Measurement

When in the time interval mode and measuring a single

event, the lCM7216A and lCM7216B must first be “primed”

prior to measuring the event of interest. This is done by first

generating a negative going edge on Channel A followed by a

negative going edge on Channel B to start the “measurement

interval”. The inputs are then primed ready for the measure-

ment. Positive going edges on A and B, before or after the

priming, will be needed to restore the original condition.

Priming can be easily accomplished using the circuit in

Figure 13.

FIGURE 13. PRIMING CIRCUIT, SIGNALS A & B BOTH HIGH OR

LOW

Following the priming procedure (when in single event or 1

cycle range) the device is ready to measure one (only)

event.

When timing repetitive signals, it is not necessary to “prime”

the lCM7216A and lCM7216B as the first alternating signal

states automatically prime the device. See Figure 1.

During any time interval measurement cycle, the ICM7216A

and lCM7216B require 200ms following B going low to

update all internal logic. A new measurement cycle will not

take place until completion of this internal update time.

Oscillator Considerations

The oscillator is a high gain CMOS inverter. An external

resistor of 10M

Ω to 22MΩ should be connected between the

OSCillator INPUT and OUTPUT to provide biasing. The

oscillator is designed to work with a parallel resonant 10MHz

quartz crystal with a static capacitance of 22pF and a series

resistance of less than 35

Ω.

can be calculated as follows:

DEVICE

TYPE

1

CD4049B Inverting Buffer

2

CD4070B Exclusive - OR

SIGNAL A

SIGNAL B

INPUT A

INPUT B

N.O.

100K

1N914

150K

1

0.1

µF

10K

10nF

11

1

2

2

PRIME

g

M

IN

C

OUT

R

S

1

C

O

C

L

+



 2

=

whereC

L

C

IN

C

OUT

C

IN

C

OUT

+





=

ω = 2πf

for the lCM7216 to insure reliable startup. The OSCillator

static capacitance.

In cases where non decade prescalers are used it may be

desirable to use a crystal which is neither 10MHz or 1MHz.

In that case both the multiplex rate and time between mea-

surements will be different. The multiplex rate is

for 10MHz mode and

for

the 1MHz mode. The time between measurements is

in the 10MHz mode and

in the 1MHz mode.

The crystal and oscillator components should be located as

close to the chip as practical to minimize pickup from other

signals. Coupling from the EXTERNAL OSClLLATOR INPUT

to the OSClLLATOR OUTPUT or INPUT can cause undesir-

able shifts in oscillator frequency.

Display Considerations

The display is multiplexed at a 500Hz rate with a digit time of

244

µs. An interdigit blanking time of 6µs is used to prevent

display ghosting (faint display of data from previous digit

superimposed on the next digit). Leading zero blanking is

provided, which blanks the left hand zeroes after decimal

point or any non zero digits. Digits to the right of the decimal

point are always displayed. The leading zero blanking will be

disabled when the Main Counter overflows.

The lCM7216A is designed to drive common anode LED dis-

plays at peak current of 25mA/segment, using displays with

3mA under these conditions. The lCM7216B and lCM7216D

are designed to drive common cathode displays at peak cur-

15mA. Resistors can be added in series with the segment

drivers to limit the display current in very efficient displays, if

required. The Typical Performance Curves show the digit

and segment currents as a function of output voltage.

increased up to 6.0V. However, care should be taken to see

that maximum power and current ratings are not exceeded.

The segment and digit outputs in lCM7216's are not directly

compatible with either TTL or CMOS logic when driving

LEDs. Therefore, level shifting with discrete transistors may

be required to use these outputs as logic signals.

f

MUX

f

OSC

210

4

×

=

f

MUX

f

OSC

210

3

×

=

210

6

×

f

OSC

210

5

×

f

OSC