 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
JS48F4400P0VB00 Datasheet(PDF) 6 Page - Numonyx B.V |
|
||||||||||||||||||||||||||||||
JS48F4400P0VB00 Datasheet(HTML) 6 Page - Numonyx B.V |
|
|
6 / 99 page  P30 Datasheet November 2007 6 Order Number: 306666-11 1.0 Introduction This document provides information about the Numonyx™ StrataFlash® Embedded Memory (P30) product and describes its features, operation, and specifications. The Numonyx™ StrataFlash® Embedded Memory (P30) product is the latest generation of Numonyx™ StrataFlash® memory devices. Offered in 64-Mbit up through 512-Mbit densities, the P30 device brings reliable, two-bit-per-cell storage technology to the embedded flash market segment. Benefits include more density in less space, high- speed interface, lowest cost-per-bit NOR device, and support for code and data storage. Features include high-performance synchronous-burst read mode, fast asynchronous access times, low power, flexible security options, and three industry standard package choices. The P30 product family is manufactured using Intel* 130 nm ETOX™ VIII process technology. The P30 product family is also planned on the Intel* 65nm process lithography. 65nm AC timing changes are noted in this datasheet, and should be taken into account for all new designs. 1.1 Nomenclature 1.2 Acronyms 1.8 V: VCC (core) voltage range of 1.7 V – 2.0 V 3.0 V: VCCQ (I/O) voltage range of 1.7 V – 3.6 V 9.0 V: VPP voltage range of 8.5 V – 9.5 V Block: A group of bits, bytes, or words within the flash memory array that erase simultaneously when the Erase command is issued to the device. The P30 has two block sizes: 32-KByte and 128-KByte. Main block: An array block that is usually used to store code and/or data. Main blocks are larger than parameter blocks. Parameter block: An array block that is usually used to store frequently changing data or small system parameters that traditionally would be stored in EEPROM. Top parameter device: A device with its parameter blocks located at the highest physical address of its memory map. Bottom parameter device: A device with its parameter blocks located at the lowest physical address of its memory map. BEFP: Buffer Enhanced Factory Programming CUI: Command User Interface MLC: Multi-Level Cell OTP: One-Time Programmable PLR: Protection Lock Register PR: Protection Register RCR: Read Configuration Register |
Similar Part No. - JS48F4400P0VB00 |
|
Similar Description - JS48F4400P0VB00 |
|
|
Link URL |
| Privacy Policy |
| ALLDATASHEET.NET |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
