74LVQ32_04 datasheet(1/11 Pages) STMICROELECTRONICS

Part #	74LVQ32

Description	LOW VOLTAGE CMOS QUAD 2-INPUT OR GATE

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July 2004

s

HIGH SPEED:

tPD = 5.2 ns (TYP.) at VCC = 3.3 V

s

COMPATIBLE WITH TTL OUTPUTS

s

LOW POWER DISSIPATION:

ICC = 2µA (MAX.) at TA=25°C

s

LOW NOISE:

VOLP = 0.3V (TYP.) at VCC = 3.3V

s

75

Ω TRANSMISSION LINE DRIVING

CAPABILITY

s

SYMMETRICAL OUTPUT IMPEDANCE:

|IOH| = IOL = 12mA (MIN) at VCC = 3.0V

s

PCI BUS LEVELS GUARANTEED AT 24 mA

s

BALANCED PROPAGATION DELAYS:

tPLH ≅ tPHL

s

OPERATING VOLTAGE RANGE:

VCC(OPR) = 2V to 3.6V (1.2V Data Retention)

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PIN AND FUNCTION COMPATIBLE WITH

74 SERIES 32

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IMPROVED LATCH-UP IMMUNITY

DESCRIPTION

The 74LVQ32 is a low voltage CMOS QUAD

2-INPUT OR GATE fabricated with sub-micron

silicon gate and double-layer metal wiring C2MOS

technology. It is ideal for low power and low noise

3.3V applications.

The internal circuit is composed of 2 stages

including buffer output, which enables high noise

immunity and stable output.

All

inputs

and

outputs

are

equipped

with

protection circuits against static discharge, giving

them 2KV ESD immunity and transient excess

voltage.

74LVQ32

LOW VOLTAGE CMOS QUAD 2-INPUT OR GATE

Figure 1: Pin Connection And IEC Logic Symbols

Table 1: Order Codes

PACKAGE

T & R

SOP

74LVQ32MTR

TSSOP

74LVQ32TTR

TSSOP

SOP

Rev. 5

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STMicroelectronics	74LVC32A	221Kb / 11P	LOW VOLTAGE CMOS QUAD 2-INPUT OR GATE HIGH PERFORMANCE July 2004 Rev. 4
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74LVQ32 Datasheet(PDF) 1 Page - STMicroelectronics

74LVQ32 Datasheet(HTML) 1 Page - STMicroelectronics

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