LPC1765FBD100 datasheet(5/70 Pages) ETC2

Part #	LPC1765FBD100

Description	32-bit ARM Cortex-M3 microcontroller;

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Manufacturer	ETC2 [List of Unclassifed Manufacturers]

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LPC1766_0.02

Objective data sheet

Rev. 00.02 — 12 August 2008

5 of 70

NXP Semiconductors

LPC1766

Fast communication chip

5.

Block diagram

Grey-shaded blocks represent peripherals with connection to the GPDMA.

Fig 1.

Block diagram

SRAM 64 kB

ARM

CORTEX-M3

TEST/DEBUG

INTERFACE

FLASH

ACCELERATOR

FLASH 256 kB

DMA

CONTROLLER

ETHERNET

CONTROLLER

WITH DMA

USB HOST/

DEVICE/OTG

CONTROLLER

WITH DMA

I-code

bus

D-code

bus

system

bus

AHB TO

APB

BRIDGE 0

HIGH-SPEED

GPIO

AHB TO

APB

BRIDGE 1

CLOCK

GENERATION,

POWER CONTROL,

SYSTEM

FUNCTIONS

XTAL1

XTAL2

RESET

clocks and

controls

JTAG

interface

debug

port

USB PHY

SSP0

UART2/3

I2S

I2C2

RI TIMER

TIMER2/3

EXTERNAL INTERRUPTS

SYSTEM CONTROL

MOTOR CONTROL PWM

QUADRATURE ENCODER

SSP1

UART0/1

CAN1/2

I2C0/1

SPI0

TIMER 0/1

WDT

PWM1

12-bit ADC

PIN CONNECT

GPIO INTERRUPT CONTROL

RTC

BACKUP REGISTERS

32 kHz

OSCILLATOR

APB slave group 1

APB slave group 0

DAC

RTC POWER DOMAIN

LPC1766

master

002aad944

slave

ROM

slave

Multilayer AHB Matrix

P0 to

P3

SDA2

SCL2

SCK0

SSEL0

MISO0

MOSI0

SCK1

SSEL1

MISO1

MOSI1

RXD2/3

TXD2/3

PHA, PHB

INDEX

EINT[3:0]

AOUT

MC0A/B

MC1A/B

MC2A/B

MCFB1/2

MCABORT

4

× MAT2

2

× MAT3

2

× CAP2

2

× CAP3

3

× I2SRX

3

× I2STX

TX_MCLK

RX_MCLK

RTCX1

RTCX2

VBAT

PWM1[7:0]

2

× MAT0/1

2

× CAP0/1

RD1/2

TD1/2

SDA0/1

SCL0/1

AD0[7:0]

SCK/SSEL

MOSI/MISO

8

× UART1

RXD0/TXD0

RMII pins

USB pins

CLKOUT

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