V62C2161024L(L)

8

Notes (Write Cycle)

1.

L-version includes this feature.

2.

This Parameter is sampled and not 100% tested.

3.

For test conditions, see AC Test Condition, Figure A.

4.

This parameter is tested with CL = 5pF as shown in Figure B. Transition is measured + 500mV from steady-state voltage.

5.

This parameter is guaranteed, but is not tested.

6.

WE is High for read cycle.

7.

CE and OE are LOW for read cycle.

8.

Address valid prior to or coincident with CE transition LOW.

9.

All read cycle timings are referenced from the last valid address to the first transtion address.

10. CE or WE must be HIGH during address transition.

11. All write cycle timings are referenced from the last valid address to the first transition address.

Data Retention Mode

V

Vcc_typ

V

CC

CE

t

R

t

CDR

Vcc_typ

Parameter

Symbol

Test Condition

Min

Max

Unit

1.0

-

V

Data Retention Current

-

1

µA

Chip Deselect to Data Retention Time

0

-

ns

-

ns

REV. 1.1 April 2001 V62C2161024L(L)