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L4972A Datasheet(PDF) 3 Page - STMicroelectronics |
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L4972A Datasheet(HTML) 3 Page - STMicroelectronics |
3 / 22 page 3/22 L4972A Table 3. Absolute Maximum Ratings (*) SO-20 Table 4. Thermal Data 3 Circuit Operation The L4972A is a 2A monolithic stepdown switching regulator working in continuous mode realized in the new BCD Technology. This technology allows the integration of isolated vertical DMOS power transistors plus mixed CMOS/Bipolar transistors. The device can deliver 2A at an output voltage adjustable from 5.1V to 40V and contains diagnostic and control functions that make it particularly suitable for microprocessor based systems. 3.1 BLOCK DIAGRAM The block diagram shows the DMOS power transistors and the PWM control loop. Integrated functions include a reference voltage trimmed to 5.1V ± 2%, soft start, undervoltage lockout, oscillator with feedfor- ward control, pulse by pulse current limit, thermal shutdown and finally the reset and power fail circuit. The reset and power fail circuit provides an output signal for a microprocessor indicating the status of the sys- tem. Device turn on is around 11V with a typical 1V hysterysis, this threshold porvides a correct voltage for the driving stage of the DMOS gate and the hysterysis prevents instabilities. An external bootstrap capacitor charge to 12V by an internal voltage reference is needed to provide cor- rect gate drive to the power DMOS. The driving circuit is able to source and sink peak currents of around 0.5A to the gate of the DMOS transistor. A typical switching time of the current in the DMOS transistor is 50ns. Due to the fast commutation switching frequencies up to 200kHz are possible. The PWM control loop consists of a sawtooth oscillator, error amplifier, comparator, latch and the output Symbol Parameter Value Unit V11 Input Voltage 55 V V11 Input Operating Voltage 50 V V20 Output DC Voltage Output Peak Voltage at t = 0.1 µs f = 200kHz -1 -5 V V I20 Maximum Output Current Internally Limited VI Boostrap Voltage Boostrap Operating Voltage 65 V11 + 15 V V V4, V8 Input Voltage at Pins 4, 12 12 V V3 Reset Output Voltage 50 V I3 Reset Output Sink Current 50 mA V2, V7, V9, V10 Input Voltage at Pin 2, 7, 9, 10 7 V I2 Reset Delay Sink Current 30 mA I7 Error Amplifier Output Sink Current 1 A I8 Soft Start Sink Current 30 mA Ptot Total Power Dissipation at TPINS ≤ 90°C at Tamb = 70°C (No copper area on PCB) 5 / 3.75(*) 1.3/1 (*) W W TJ, Tstg Junction and Storage Temperature -40 to 150 °C Symbol Parameter PowerDIP SO20 Unit Rth j-pins Thermal Resistance Junction-Pins max, 12 16 °C/W Rth j-amb Thermal Resistance Junction-ambient max, 60 80 °C/W |
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