AAT2504178

Adjustable 3-Channel Regulator

SystemPower

TM

PRODUCT DATASHEET

2

2504.2008.02.1.2

www .analogictech.com

AAT2504178

Adjustable 3-Channel Regulator

SystemPower

TM

PRODUCT DATASHEET

2

2504.2008.02.1.2

www .analogictech.com

Pin Descriptions

Pin #

Symbol

Function

1

FBB

Feedback input pin for LDOB. This pin is used to regulate the output of LDOB to the desired value via an

external resistor divider.

2

ENA

Enable pin for LDOA. Active high.

3

ENB

Enable pin for LDOB. Active high.

4

MODE/SYNC

PWM operation and oscillator synchronization pin. Connect to ground for PWM/Light Load operation

and optimized efficiency throughout the load range. Connect high for low noise PWM operation under

all operating conditions. When connected to an external clock, the internal oscillator is disabled and the

step-down converter is synchronized to an external clock applied to this pin (PWM only).

5FB

Feedback input pin for the step-down converter. This pin is used to see the output of the converter to

regulate to the desired value via an external resistor divider.

6

AGND

Ground connection pin.

7

PGND

Main power ground return pin for the step-down converter. Connect to the output and input capacitor

return.

8, 9

LX

Connect inductor to this pin. Switching node internally connected to the drain of both high- and low-side

MOSFETs.

10

VP

Input supply voltage for the converter. Must be closely decoupled.

11, 12

N/C

Not connected.

13

VIN

Bias supply. Supply power for the internal circuitry. Connect to input power via low pass filter with de-

coupling to AGND.

14

EN

Enable for the step-down converter. Active high.

15

POK

Power-OK pin with open drain output. It is pulled low when the OUTA pin is outside the regulation win-

dow. Place a pull-up resistor between POK and OUTA.

16

FBA

Feedback input pin for LDOA. This pin is used to regulate the output of LDOA to the desired value via an

external resistor divider.

17

OUTA

LDOA output pin; should be closely decoupled with a low-ESR ceramic capacitor.

18

VLDOA

Input voltage pin for linear regulator A; should be closely decoupled.

19

VLDOB

Input voltage pin for linear regulator B; should be closely decoupled.

20

OUTB

LDOB output pin; should be closely decoupled with a low-ESR ceramic capacitor.

EP

Exposed paddle; connect to ground directly beneath the package.

Pin Configuration

QFN34-20

(Top View)

1

3

2

5

4

6

16

14

15

12

13

11

FBB

ENA

ENB

MODE/SYNC

FB

AGND

VIN

EN

N/C

N/C

POK

FBA