AAT2603

Total Power Solution for Portable Applications

PRODUCT DATASHEET

2603.2008.06.1.0

3

www .analogictech.com

AAT2603

Total Power Solution for Portable Applications

PRODUCT DATASHEET

2603.2008.06.1.0

3

www .analogictech.com

Pin Descriptions

Pin #

Symbol

Function

1

LX2

DC-DC2 (Buck2) switching node. Connect the output inductor to LX2. Connected internally to the

drains o f both high-side and low-side switches.

2

ENB2

DC-DC2 (Buck2) enable input. Active high.

3

FBB2

DC-DC2 (Buck2) feedback input. For externally adjustable versions, connect a resistor divider

from Buck2 output to FBB2 to AGND to set the Buck2 output voltage.

4

ENL3

LDO3 enable input. Active high.

5

AGND

Analog ground. Connect AGND to PGND1 and PGND2 as close as possible to the device.

6

FBL3

LDO3 feedback input. Connect a resistor divider from OUTL3 to FBL3 to AGND to set the LDO3

output voltage.

7

OUTL3

LDO3 output. Should be closely decoupled to AGND with a 4.7μF or greater capacitor.

8

INL34

LDO3 and LDO4 input. Should be closely decoupled to AGND with a 2.2μF or greater capacitor.

9

OUTL4

LDO4 output. Should be closely decoupled to AGND with a 4.7μF or greater capacitor.

10

FBL4

LDO4 feedback input. Connect a resistor divider from OUTL4 to FBL4 to AGND to set the LDO4

output voltage.

11

ENL4

LDO4 enable input. Active high.

12

BYP

Reference Bypass. Bypass BYP to AGND with a 0.01μF or greater capacitor to reduce the LDO1

output noise.

13

ENL1

LDO1 enable input. Active high.

14

FBL1

LDO1 feedback input. Connect a resistor divider from OUTL1 to FBL1 to AGND to set the LDO1

output voltage.

15

OUTL1

LDO1 output. Should be closely decoupled to AGND with a 4.7μF or greater capacitor.

16

INL12

LDO1 and LDO2 input. Should be closely decoupled to AGND with a 2.2μF or greater capacitor.

17

OUTL2

LDO2 output. Should be closely decoupled to AGND with a 4.7μF or greater capacitor.

18

FBL2

LDO2 feedback input. Connect a resistor divider from OUTL2 to FBL2 to AGND to set the LDO2

output voltage.

19

ENL2

LDO2 enable input. Active high.

20

AIN

Analog voltage input. AIN is the bias supply for the device. Should be closely decoupled to AGND

with a 2.2μF or greater capacitor.

21

FBB1

DC-DC1 (Buck1) feedback input. For externally adjustable versions, connect a resistor divider

from Buck1 output to FBB1 to AGND to set the Buck1 output voltage.

22

ENB1

DC-DC1 (Buck1) enable input. Active high.

23

SELB2

Dynamically adjusts the output voltage of DC-DC2 (Buck2) (Logic High=1.3V, Logic Low=1.0V)

24

LX1

DC-DC1 (Buck1) switching node. Connect the output inductor to LX1. Connected internally to the

drains of both high-side and low-side switches.

25

PGND1

DC-DC1 (Buck1) power ground. Connected internally to the source of the Buck1 N-channel syn-

chronous rectifier. Connect PGND1 to PGND2 and AGND as close as possible to the device.

26

INB1

DC-DC1 (Buck1) power input. Connected internally to the source of the Buck1 P-channel switch.

Should be closely decoupled to PGND1 with a 4.7μF or greater capacitor.

27

INB2

DC-DC2 (Buck2) power input. Connected internally to the source of the Buck2 P-channel switch.

Should be closely decoupled to PGND2 with a 4.7μF or greater capacitor.

28

PGND2

DC-DC2 (Buck2) power ground. Connected internally to the source of the Buck2 N-channel syn-

chronous rectifier. Connect PGND2 to PGND1 and AGND as close as possible to the device.

EP

Exposed paddle (bottom). Connect to ground as close as possible to the device.