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M27V160-100K1 Datasheet(PDF) 10 Page - STMicroelectronics |
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M27V160-100K1 Datasheet(HTML) 10 Page - STMicroelectronics |
10 / 25 page Device description M27V160 10/26 2.6 Presto III programming algorithm The Presto III Programming Algorithm allows the whole array to be programed with a guaranteed margin in a typical time of 52.5 seconds. Programming with Presto III consists of applying a sequence of 50µs program pulses to each word until a correct Verify occurs (see Figure 5.). During programing and verify operation a Margin Mode circuit is automatically activated to guarantee that each cell is programed with enough margin. No overprogram pulse is applied since the Verify in Margin Mode at VCC much higher than 3.6V provides the necessary margin to each programmed cell. Figure 5. Programming Flowchart 2.7 Program Inhibit Programming of multiple M27V160s in parallel with different data is also easily accomplished. Except for E, all like inputs including G of the parallel M27V160 may be common. A TTL low level pulse applied to a M27V160's E input and VPP at 12.5V, will program that M27V160. A high level E input inhibits the other M27V160s from being programmed. 2.8 Program Verify A verify (read) should be performed on the programmed bits to determine that they were correctly programmed. The verify is accomplished with E at VIH and G at VIL, VPP at 12.5V and VCC at 6.25V. AI00901B n = 0 Last Addr VERIFY E = 50 µs Pulse ++n = 25 ++ Addr VCC = 6.25V, VPP = 12.5V FAIL CHECK ALL WORDS BYTEVPP =VIH 1st: VCC = 5V 2nd: VCC = 3V YES NO YES NO YES NO |
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