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M48T02 Datasheet(PDF) 8 Page - STMicroelectronics |
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M48T02 Datasheet(HTML) 8 Page - STMicroelectronics |
8 / 24 page Operation modes M48T02, M48T12 8/24 The state of the eight three-state Data I/O signals is controlled by E and G. If the outputs are activated before tAVQV, the data lines will be driven to an indeterminate state until tAVQV. If the Address Inputs are changed while E and G remain active, output data will remain valid for Output Data Hold time (tAXQX) but will go indeterminate until the next Address Access. Figure 4. Read mode AC waveforms Note: WRITE Enable (W) = High. Table 3. Read mode AC characteristics Symbol Parameter(1) 1. Valid for Ambient Operating Temperature: TA = 0 to 70°C; VCC = 4.75 to 5.5V or 4.5 to 5.5V (except where noted). M48T02/M48T12 Unit –70 –150 –200 Min Max Min Max Min Max tAVAV READ Cycle Time 70 150 200 ns tAVQV Address Valid to Output Valid 70 150 200 ns tELQV Chip Enable Low to Output Valid 70 150 200 ns tGLQV Output Enable Low to Output Valid 35 75 80 ns tELQX Chip Enable Low to Output Transition 5 10 10 ns tGLQX Output Enable Low to Output Transition 5 5 5 ns tEHQZ Chip Enable High to Output Hi-Z 25 35 40 ns tGHQZ Output Enable High to Output Hi-Z 25 35 40 ns tAXQX Address Transition to Output Transition 10 5 5 ns AI01330 tAVAV tAVQV tAXQX tELQV tELQX tEHQZ tGLQV tGLQX tGHQZ VALID A0-A10 E G DQ0-DQ7 VALID |
Similar Part No. - M48T02_07 |
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Similar Description - M48T02_07 |
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