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AAT3190IKS-T1 Datasheet(PDF) 10 Page - Advanced Analogic Technologies |
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AAT3190IKS-T1 Datasheet(HTML) 10 Page - Advanced Analogic Technologies |
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10 / 16 page  AAT3190 Positive/Negative Charge Pump for Voltage Bias 10 3190.2006.01.1.2 Voltage Reference The voltage reference is a simple band gap with an output voltage equal to V BE + K*VT. The band gap reference amplifier has an additional compensation capacitor from the negative input to the output. This capacitor serves to slow down the circuit during startup and soft starts the voltage reference and the regulator output from overshoot. The reference circuit amplifier also increases the overall PSRR of the device. An 80k Ω resistor serves to isolate and buffer the amplifier from a small internal filter capacitor and an optional large external filter capacitor. Enable and Start-up The AAT3190 is disabled by pulling the EN pin low. The threshold levels lie between 0.5V and 1.5V. Even though the quiescent current of the IC during shutdown is less than 1µA, the positive output volt- age (V OP) and any load current associated with it does not disappear without the complete removal of the input voltage. This is due to the fact that with no switching of the DRVP pin, the input voltage simply forward biases the Schottky diodes associated with the V OP charge pump, providing a path for load cur- rent to be drawn from the input voltage. Depending on the application, the supplies must be sequenced properly to avoid damage or latch-up. The AAT3190 start-up sequence ramps up the V OP output 200µs after the V ON output is present. The AAT3190-1 ramps up the positive supply before the negative supply. Over-Temperature Protection A logic control circuit will shut down both charge pumps in the case of an over-temperature condition. Under-Voltage Lockout A UVLO circuit disables the AAT3190 when the input voltage supply is lower than 1.8V nominal. Design Procedure and Component Selection Output Voltage The number of charge pump stages required for a given output varies with the input voltage applied. The number of stages required can be estimated by: for the positive output and for the negative output. When solving for n p and nn, round up the solution to the next highest integer to determine the number of stages required. V ON The negative output voltage is adjusted by a resis- tive divider from the output (V ON) to the FBN and REF pin. The maximum reference voltage current is 50µA; therefore, the minimum allowable value for R2 of Figure 1 is 24k Ω. It is best to select the smallest value possible for R2, as this will keep R1 to a min- imum. This limits errors due to the FBN input bias current. The FBN input has a maximum input bias current of 100nA. Using the full 50µA reference current for programming V ON: will limit the error due to the input bias current at FBN to less than 0.2%: IFBN IPGM = = 0.2% 0.1µA 50µA VREF R2 IPGM = = = 50µA 1.2 24.1k VON 2VF - VIN nn = VOP - VIN VIN - 2VF np = |
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