M48Z32V

Summary

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1

Summary

power-fail deselect circuitry and battery control logic on a single die.

The 44-pin, 330mil SOIC provides a battery pin for an external, user-supplied battery. This is

all that is required to fully non-volatize the SRAM.

Figure 1.

Logic diagram

Table 1.

Signal names

A0-A14

Address inputs

DQ0-DQ7

Data inputs / outputs

E

Chip enable input

G

Output enable input

W

WRITE enable input

Supply voltage

Ground

B +

Positive battery pin

NC

Not connected

AI04787

15

A0-A14

W

DQ0-DQ7

VCC

M48Z32V

G

VSS

8

B +

E