M48Z512BV

Operating modes

9/20

2.2

WRITE mode

The M48Z512BV is in the WRITE mode whenever W and E are active. The start of a WRITE

is referenced from the latter occurring falling edge of W or E. A WRITE is terminated by the

earlier rising edge of W or E.

The addresses must be held valid throughout the cycle. E or W must return high for a

contention; although, if the output bus has been activated by a low on E and G, a low on W

Table 3.

READ mode AC characteristics

Symbol

1.

Min

Max

Unit

READ cycle time

85

ns

Address valid to output valid

85

ns

Chip enable low to output valid

85

ns

Output enable low to output valid

45

ns

(2)

2.

Chip enable low to output transition

5

ns

(2)

Output enable low to output transition

5

ns

(2)

Chip enable high to output Hi-Z

35

ns

(2)

Output enable high to output Hi-Z

25

ns

Address transition to output transition

5

ns