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M74HC109B1R Datasheet(PDF) 1 Page - STMicroelectronics |
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M74HC109B1R Datasheet(HTML) 1 Page - STMicroelectronics |
1 / 12 page 1/12 July 2001 s HIGH SPEED : fMAX = 67MHz (TYP.) at VCC = 6V s LOW POWER DISSIPATION: ICC =2µA(MAX.) at TA=25°C s HIGH NOISE IMMUNITY: VNIH = VNIL = 28 % VCC (MIN.) s SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN) s BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL s WIDE OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 6V s PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 109 DESCRIPTION The M74HC109 is an high speed CMOS DUAL J-K FLIP FLOP WITH PRESET AND CLEAR fabricated with silicon gate C2MOS technology. In accordance with the logic level on the J and K input this device changes state on positive going transition of the clock pulse. CLEAR and PRESET are independent of the clock and are accomplished by a logic low on the corresponding input. All inputs are equipped with protection circuits against static discharge and transient excess voltage. M74HC109 DUAL J-K FLIP FLOP WITH PRESET AND CLEAR PIN CONNECTION AND IEC LOGIC SYMBOLS ORDER CODES PACKAGE TUBE T & R DIP M74HC109B1R SOP M74HC109M1R M74HC109RM13TR TSSOP M74HC109TTR TSSOP DIP SOP |
Similar Part No. - M74HC109B1R |
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Similar Description - M74HC109B1R |
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