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ISPCLOCK5620A Datasheet(PDF) 10 Page - Lattice Semiconductor

Part # ISPCLOCK5620A
Description  In-System Programmable, Enhanced Zero-Delay, Clock Generator with Universal Fan-Out Buffer
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Manufacturer  LATTICE [Lattice Semiconductor]
Direct Link  http://www.latticesemi.com
Logo LATTICE - Lattice Semiconductor

ISPCLOCK5620A Datasheet(HTML) 10 Page - Lattice Semiconductor

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Lattice Semiconductor
ispClock5600A Family Data Sheet
1-10
Figure 1-5. LVDS/LVPECL Termination Load
Figure 1-6. Differential HSTL/SSTL Termination Load
ispCLOCK
50Ω/36"
34Ω
34Ω
50Ω/36"
0.1U
0.1U
44.2Ω
3pF
(parasitic)
3pF
(parasitic)
SCOPE
50Ω
50Ω
5pF
5pF
ChA
ChB
50Ω/3"
50Ω/1"
50Ω/3"
50Ω/1"
Interface Circuit
33.2Ω
33.2Ω
ispCLOCK
950Ω
950Ω
50Ω
50Ω
SCOPE
50Ω
50Ω
5pF
5pF
50Ω/3"
50Ω/1"
50Ω/3"
50Ω/1"
VTERM


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